MOSFET Loss Calculator (BLDC / PMSM)

MOSFET Loss Calculator (BLDC / PMSM, 3‑Phase Inverter)

Kadence‑ready • Single‑file • No dependencies
Mode: BLDC (6‑Step)

Inputs

Per‑phase RMS current
Edges used for switching, gate, Coss, and RR losses
≈ 1/3 for upper and 1/3 for lower over an electrical cycle
I at commutation ≈ ksw·IPHASE,rms·√2 (PMSM ~0.8–0.9, BLDC ~0.95–1.0)
Optional, used in notes only
MOSFET Parameters
≈0.3–0.5%/°C

Key Results

Per‑Device / Per‑Leg / Total Inverter

Assumptions & Equations
  • Conduction loss (per device): Pcond ≈ IPHASE,rms2 · RDS(on),T · dutydevice.
  • Switching energy (per edge): Esw ≈ 0.5·VBUS·Isw·(tr+tf). Isw ≈ ksw·IPHASE,rms·√2.
  • Gate drive loss: Pgate ≈ Qg·VGS·fSW·edges.
  • Coss loss (per device): E ≈ 0.5·Coss·VBUS2 per edge.
  • Reverse‑recovery loss: E ≈ Qrr·VBUS per edge (commutation of body diode).
  • Dead‑time diode conduction: P ≈ VD·Isw·tdead·fSW·edges.
  • Edges per device: 2 for complementary PWM; 1 if only one device per leg is PWM’d.
  • Duty per device: ~1/3 for upper and ~1/3 for lower over an electrical cycle (BLDC 6‑step and PMSM sinusoidal). Override if needed.
  • Estimates ignore non‑linearities (voltage/current dependency of Qg/Coss/Qrr and temp rise feedback). Validate on hardware.
© 2025 MOSFET Loss Calculator. Drop‑in HTML for Kadence/WordPress.

How to Use the MOSFET Loss Calculator (BLDC / PMSM)

Engineer‑friendly steps to estimate conduction, switching, gate‑drive, Coss, reverse‑recovery, and dead‑time diode losses for a 3‑phase inverter. Works for BLDC (6‑step) and PMSM (sinusoidal/SVPWM).

0) Pick Mode

  • BLDC (6‑step): trapezoidal back‑EMF; commutation current near peak → set ksw ≈ 0.95–1.00.
  • PMSM (sinusoidal/SVPWM): sinusoidal phase currents → set ksw ≈ 0.80–0.90.
The calculator uses Isw = ksw · IPHASE,rms · √2 at commutation for switching, RR, Coss and dead‑time estimates.

1) Operating Points

  • VBUS (DC link)
  • IPHASE,rms (per phase)
  • fSW (kHz)
  • Optional: Electrical frequency (for your own notes)

2) PWM & Edges

  • PWM per device: Complementary (2 edges/cycle/device) or Single‑ended (1 edge).
  • Conduction duty per device: default ≈ 1/3 for each switch over an electrical cycle.
Edges affect switching, gate, Coss, RR losses. Duty affects conduction loss.

3) Conduction Parameters

  • Enter RDS(on)@25°C, temp‑coefficient (α %/°C), and Tj.
  • Or provide RDS(on)@T directly to override the temperature model.
  • Conduction loss: Pcond ≈ IPHASE,rms2 · RDS(on),T · duty.

4) Switching Parameters

  • tr, tf (ns) and ksw determine hard‑switch loss: Esw ≈ 0.5·V·Isw·(tr+tf) per edge.
  • Gate drive: Pgate ≈ Qg·VGS·fSW·edges.
Shorter transition times reduce Esw but may increase EMI/dV/dt. Check snubbers and layout.

5) Capacitive & Reverse‑Recovery

  • Coss loss: 0.5·Coss·VBUS2 per edge.
  • Reverse‑recovery: Qrr·VBUS per edge (commutation of the body diode).
For external SiC Schottky diodes, set Qrr ≈ 0 for the MOSFET; include diode loss separately if needed.

6) Dead‑Time & Body‑Diode

  • Enter dead‑time and body‑diode Vf.
  • Dead‑time loss: P ≈ Vf·Isw·tdead·fSW·edges.
  • Minimize dead‑time without inducing cross‑conduction; verify with scope.

7) Read the Results

  • Per‑device: Pcond, Psw, Pgate, Pcoss, Prr, Pdead, Ptotal.
  • Per‑leg and inverter totals (x2 and x6) are shown for quick thermal budgeting.
  • Use totals with thermal path (RθJA, RθJC, TIM) to estimate Tj rise.

Quick Checklist

  • Mode set correctly (BLDC vs PMSM)
  • ksw realistic for your commutation
  • Edges/device match PWM scheme
  • Duty/device ≈ 1/3 (or your value)
  • RDS(on) at Tj or overridden
  • tr/tf, Qg, Coss, Qrr, Vf from datasheet
  • Dead‑time optimized
  • Thermal headroom ≥ 20–30%
FAQ & Tips

What value should I use for duty per device?
For a 3‑phase leg with equal sharing, each device conducts roughly one‑third of the electrical cycle. If your modulation or current waveform differs, adjust accordingly.

How do I pick ksw?
It’s the fraction of peak current seen at commutation. BLDC 6‑step often uses 0.95–1.00; sinusoidal PMSM 0.80–0.90. Use scope data if available.

Single‑ended vs complementary PWM?
Single‑ended has one switching device per leg (1 edge/device), complementary has both devices switching (2 edges/device) and often lower current ripple but higher switching/gate/Coss losses per device.

Using external SiC diodes?
Set MOSFET Qrr near zero; include diode loss separately if needed. For superjunction MOSFET body diodes, Qrr can be significant.

Why do results differ from SPICE or the bench?
Datasheet values are voltage/temperature dependent and non‑linear. Layout parasitics, current ripple, and modulation details matter. Treat this as a first‑order estimate.

Copy‑Paste Mini Workflow

1) Choose BLDC or PMSM, set VBUS, I_PHASE,rms, fSW
2) Set PWM edges (1 or 2), duty/device ≈ 1/3, k_sw ≈ 0.95 (BLDC) or 0.85 (PMSM)
3) Enter RDS(on)@25°C, α, Tj (or override RDS(on)@T)
4) Enter t_r, t_f, Q_g, V_GS; set C_oss, Q_rr, V_f, dead-time
5) Read per-device and inverter totals; check thermal margins
6) Tweak k_sw/edges/dead-time or choose different FET; validate on bench