MLCC DC Bias Derating Calculator
MLCC DC Bias Derating Calculator
What is left of a ceramic capacitor once the DC bias, the temperature, the ageing and the tolerance have all taken their share — and then the part that matters: how far that moves your filter’s corner frequency and how many decibels of attenuation it costs you at every frequency above it.
What is left, and what it costs the filter
a 10 µF X5R at 6.3 V of bias retaining 40% from its own data sheet curve, ±20% tolerance, 5.0% per decade of ageing and 10 years since the last reflow, in an L-C filter with 10 µH
One input that has to come from your data sheet, and the arithmetic after it
kageing = 1 − (A ÷ 100) · log10(t ÷ tref) A = 3.0%/decade for X7R, 5.0% for X5R, 0 for C0G
fcorner ratio = √(Cmarked ÷ Ceffective) for L-C, and Cmarked ÷ Ceffective for R-C
attenuation lost = 20 log10(Cmarked ÷ Ceffective) dB, at every frequency above the corner
- k bias
- NOT a formula. Read it off the DC bias curve for your part, in your case size, from your manufacturer, at your bias. There is no universal relation, and published measurements do not correlate with either the voltage rating or the X5R / X7R designation
- A
- the ageing rate per decade hour. A specified maximum on the data sheet, not a constant of nature. Zero for Class I
- t
- hours since the last excursion above the Curie point. Reflow resets it, so the zero is assembly, not manufacture
- 20 log10
- above the corner an L-C attenuates as 1/(ω²LC) and an R-C as 1/(ωRC), so both lose exactly this many decibels when the capacitance falls. It is a flat shift of the whole stopband, not a change of slope
Worked example
a 10 µF X5R at 6.3 V of bias retaining 40% from its own data sheet curve, ±20% tolerance, 5.0% per decade of ageing and 10 years since the last reflow, in an L-C filter with 10 µH
The DC bias curve says 40% survives, which is the one number on this page that cannot be calculated — it has to be read
10 years is 87,600 hours, which is 1.943 decades past the 1,000 h referee time; at 5.0% per decade that is another 9.71% gone
With the low end of a ±20% tolerance on top, 10 µF × 0.400 × 0.9029 × 0.80 = 2.889 µF — 28.9% of what is printed on the part
The filter was drawn with a corner at 15.92 kHz. It has one at 29.61 kHz instead, 1.860× higher, because an L-C corner moves as the square root of the capacitance
And the number that decides whether the unit passes: 20 log₁₀(10 ÷ 2.889) = 10.78 dB of attenuation missing at every frequency above the corner. Not a change of slope — the whole stopband has moved up by that much. Recovering it takes 3.46 times the number of parts, which is the usual fix and lowers the ESL as a bonus
Why there is no generic DC bias formula on this page
| What a generic model would need to key on | What the measurements say |
|---|---|
| The ratio of applied to rated voltage | sensitivity “does not seem to correlate well with … voltage rating” in the most careful published survey |
| The dielectric designation, X5R against X7R | nor with “dielectric temperature coefficient — X5R vs X7R” |
| The case size | a real and strong effect, but a trend rather than a relation: smaller packages run out of capacitance at lower energy density, and the exterior dimensions are not the active volume |
| The manufacturer | a nominally identical 10 µF 6.3 V X5R 0805 has been reported losing anywhere from 35% to 65% at rated voltage depending on who made it |
| The dielectric formulation and layer thickness | the things it actually depends on, and neither is published |
Ageing rates, as the manufacturers specify them
| Dielectric | Class | Maximum ageing per decade hour | DC bias |
|---|---|---|---|
| C0G / NP0 | I | none | negligible — Murata does not publish a curve |
| X7R | II | 3.0% (KEMET, maximum) | severe, part-specific |
| X5R | II | 5.0% (KEMET, maximum) | severe, part-specific |
| Y5V, Z5U | II | higher still | severe, and the temperature coefficient is as bad as the bias |
The most violated assumption in power electronics
A Class II ceramic capacitor loses capacitance under DC bias, and the loss is not a rounding error. A small-package, high-value part can retain a small fraction of its marked capacitance at its own rated voltage. A designer who fits a 10 µF part and gets 2 µF has a filter corner 2.24 times higher than the one they drew and, more to the point, 14 dB less attenuation at every frequency above it. That is enough to turn a comfortable margin into a failure, and nothing on the board looks wrong.
Why this page asks you for the derating instead of computing it. DC bias behaviour is part-specific and is not derivable from first principles. It depends on the dielectric formulation and on how thin the layers are, which is why the same nominal 10 µF 25 V X7R behaves differently in 0805 and in 1210, and why two manufacturers’ versions of the same part specification behave differently from each other. The most careful published survey of the effect reports that sensitivity does not correlate well with the voltage rating or with the X5R / X7R designation — the two things a generic model would have to key on. Murata’s own simulator documentation describes its DC bias data as measured, part by part, on an LCR meter with the bias applied for sixty seconds. It is a measurement set, not a model. So: read the retention off the curve for your part, in your case size, from your manufacturer, at your bias, and put it in the field above. Building a generic curve into this page would have been easy and would have been dishonest.
Ageing is different, and is modelled here. Class II dielectrics are ferroelectric, and after the last time the material went above its Curie point — around 125 to 130 °C for barium titanate — the domains slowly settle and the capacitance falls logarithmically with time. The rate is a specified maximum on the data sheet: KEMET’s commercial X7R is 3.0% per decade hour and its X5R is 5.0%, both indexed to a referee time of 48 or 1,000 hours. The form is C(t) = C(tref)·(1 − A·log10(t ÷ tref)), so a part loses as much in its first decade as in the following nine. The clock is not years since manufacture. Reflow soldering takes the part far above the Curie point and resets it completely, so for a board the zero is the day it was assembled; a de-aged part measured straight out of a 150 °C bake will read high against the same part a year later, and both readings are correct.
Then the consequence, which is the part nobody works out. Above its corner an L-C low-pass attenuates as 1/(ω²LC) and an R-C low-pass as 1/(ωRC). In both cases the attenuation is directly proportional to C, so losing capacitance by a factor k costs exactly 20·log10(k) decibels — at every frequency above the corner, as a flat shift of the whole stopband rather than a change of slope. Halve the capacitance and you lose 6 dB everywhere. Get a fifth of it and you lose 14. The corner itself moves as √k in an L-C filter and as k in an R-C one, which is the smaller of the two problems but the one people notice first because it shows up on a Bode plot.
Class I dielectrics do not do any of this. C0G/NP0 has essentially no voltage coefficient, no ageing and a temperature coefficient of ±30 ppm/°C. It costs an order of magnitude in capacitance per unit volume, which is why nobody builds a bulk rail out of it — but where the capacitance has to be the capacitance, in a timing network, a filter corner that has to be where you put it, or a compensation network, use C0G. That is genuinely actionable advice and it is the shortest route out of this page.
What else to do. Derate the voltage: a part rated at two or three times the bias, in the same case size, usually gives more real capacitance than a larger marked value at a lower rating. Go up a case size. Put several in parallel, which recovers the capacitance and reduces the series inductance at the same time — and then check the capacitor self-resonance calculator for what paralleling different values does, because it is not always an improvement. For the ripple and life side of the same component see the capacitor ripple and ESR calculator, and for reading the marking, the capacitor code calculator.
Frequently asked questions
How much capacitance does an MLCC lose under DC bias?
It depends entirely on the part, and that is not a dodge — it is the whole engineering content of the question. A high-capacitance Class II part in a small case can retain well under half its marked value at its rated voltage, and a nominally identical part from a different manufacturer can be substantially better or worse. There is no universal formula. Read the DC bias curve for your exact part, or use the manufacturer’s simulator, and put that number into this page.
Why is there no generic DC bias formula on this calculator?
Because a defensible one does not exist. Published measurements show that the sensitivity does not correlate well with the voltage rating or with whether the part is X5R or X7R, and the things it does depend on — the dielectric formulation and the layer thickness — are not published. A calculator that turned voltage ratio and case size into a derating percentage would be inventing a curve, and a reader would have no reason to doubt it.
Do C0G or NP0 capacitors lose capacitance under DC bias?
Essentially no. Class I dielectrics are not ferroelectric: they have no meaningful voltage coefficient, no ageing, and a temperature coefficient of ±30 ppm/°C. Murata’s simulator does not even publish a DC bias curve for C0G because the change is too small to plot. Where the capacitance must be the capacitance, that is the answer — at a large cost in capacitance per unit volume.
Does a ceramic capacitor recover its capacitance if I remove the bias?
The bias effect is reversible — take the voltage off and the capacitance comes back. Ageing is different: it only reverses when the part goes above its Curie point again, which soldering does and a 150 °C bake for half an hour does deliberately. The two are separate mechanisms and this page computes them separately.
How many decibels do I lose if my capacitor is half its marked value?
6 dB, at every frequency above the filter’s corner, in both an L-C and an R-C low-pass. The attenuation above the corner is proportional to the capacitance, so the shortfall is 20·log₁₀ of the capacitance ratio and it is a flat shift of the whole stopband, not a change of slope. A fifth of the marked value costs 14 dB.
Should I count ageing from the date the capacitor was made?
No — from the last time it went above its Curie point, which for a soldered board means the day it was assembled. Reflow resets the ageing completely. That is also why a reworked board has a capacitor younger than the board, and why parts measured before and after assembly legitimately read differently.
Related calculators
References
- KEMET, X7R Dielectric, 6.3 – 250 VDC (Commercial Grade), data sheet. Maximum ageing rate 3.0% per decade hour; capacitance measurements indexed to a referee time of 48 or 1,000 hours; capacitance change limited to ±15% from −55 °C to +125 °C.
- KEMET, X5R Dielectric, 4 – 50 VDC (Commercial Grade), data sheet. Maximum ageing rate 5.0% per decade hour; the same 48 or 1,000 hour referee time; capacitance change ±15% from −55 °C to +85 °C referenced to +25 °C and 0 V DC applied.
- Murata, SimSurfing — measurement conditions for multilayer ceramic capacitor characteristics. DC bias data measured on an Agilent E4980A at 1 kHz (120 Hz above 10 µF), 25 ± 3 °C, with the bias applied for 60 seconds and swept from 0 V to the rated voltage; temperature characteristics measured with 50% of rated voltage applied for one minute — which is why multiplying a bias figure by a separate temperature figure double-counts. C0G/NP0 is excluded from the DC bias data because the change is too small to be worth plotting.
- Effects of DC Bias on Multi-Layer Ceramic Capacitors, osengr.org. A measurement study over 10,000 hours on AVX 10 µF 16 V parts in 1210 at several bias levels. The finding this page rests on: sensitivity to DC bias “does not seem to correlate well with: Dielectric temperature coefficient – X5R vs X7R [or] Voltage rating”, with energy density offered only as “a rough predictor” whose spread makes it unreliable for part selection.
- European Passive Components Institute, MLCC DC bias and ageing capacitance loss explained. The de-ageing mechanism — reheating above the Curie point resets the structure and returns the capacitance to its initial value — and the spread across manufacturers for a 10 µF 6.3 V X5R 0805, reported between 35% and 65% loss at rated voltage.
- Digi-Key / Johanson Dielectrics, Ceramic Capacitor Aging: What to Expect. The logarithmic ageing form, around 3% per decade hour for a 10 µF X7R, the ~130 °C Curie point, and de-ageing by 150 °C for a minimum of 30 minutes.