Microstrip Impedance Calculator
Microstrip Impedance Calculator
Characteristic impedance, effective permittivity, propagation delay and guided wavelength for a PCB microstrip from its width, dielectric height, copper weight and εᵣ — or the width you need for a target impedance, by bounded iteration.
microstrip impedance
A 3 mm trace on 1.6 mm FR-4, εᵣ 4.3, 1 oz copper, 50 mm long, at 1 GHz
Hammerstad’s microstrip equations
u ≤ 1: Z₀ = (60/√εeff) · ln(8/u + u/4)
u ≥ 1: Z₀ = (120π/√εeff) ÷ [u + 1.393 + 0.667 ln(u + 1.444)]
copper thickness: Δu = (t/πh) ln(1 + 4e / [(t/h)coth²√(6.517u)]), added to u
tpd = √εeff / c λg = c / (f√εeff)
- w, h
- trace width and the height of the dielectric under it, to the reference plane
- eps r
- the laminate’s relative permittivity, about 4.3 for FR-4 at 1 GHz and falling with frequency
- eps eff
- the permittivity the field actually sees, between 1 and eps r, because part of the field is in the air above the trace
- t
- copper thickness — 35 µm for 1 oz. Thicker copper widens the trace electrically and lowers the impedance
- c
- 299,792,458 m/s. On FR-4 microstrip a signal travels at about 55% of it
Worked example
A 3 mm trace on 1.6 mm FR-4, εᵣ 4.3, 1 oz copper, 50 mm long, at 1 GHz
w/h = 3 ÷ 1.6 = 1.875, so the u ≥ 1 branch applies
The copper adds Δu = 0.043 to that ratio before the impedance is taken
εeff = (4.3+1)/2 + (4.3−1)/2 × (1 + 12/1.903)−1/2 = 3.2605 — less than 4.3, because part of the field is in the air
Z₀ = 120π ÷ √3.2605 ÷ (1.918 + 1.393 + 0.667 ln 3.362) = 50.67 Ω
Propagation delay is √εeff/c = 6.0231 ps/mm, so the 50 mm trace delays the signal by 301.2 ps; at 1 GHz the guided wavelength is 166.03 mm and the trace is 108.4° long
IPC-2141's equation gives 49.82 Ω on the same geometry — close, but it is a narrower fit
Widths for the impedances people actually ask for
| Case | Dielectric height | εᵣ | Trace width | In mils | Effective permittivity | Notes |
|---|---|---|---|---|---|---|
| 50 Ω on the outer layer of a 1.6 mm two-layer FR-4 board | 1.600 mm | 4.3 | 3.069 mm | 120.8 mil | 3.266 | The classic, and the reason nobody routes controlled impedance on a plain two-layer board: the trace has to be 3 mm wide. |
| 50 Ω over a 0.8 mm dielectric | 0.800 mm | 4.3 | 1.509 mm | 59.4 mil | 3.265 | Halve the dielectric and the width halves with it — the ratio w/h is what sets the impedance. |
| 50 Ω over a 0.254 mm (10 mil) prepreg | 0.254 mm | 4.2 | 0.459 mm | 18.1 mil | 3.196 | A common four-layer stack-up: signal on layer 1, ground on layer 2, one prepreg between them. |
| 50 Ω over a 0.2 mm prepreg | 0.200 mm | 4.2 | 0.354 mm | 13.9 mil | 3.195 | The thin-prepreg case the brief calls the “inner layer” one. It is a trace with a plane on ONE side; a trace with planes on both sides is a stripline and this page does not model it. |
| 75 Ω on 1.6 mm FR-4 | 1.600 mm | 4.3 | 1.392 mm | 54.8 mil | 3.086 | Video and cable-TV impedance. Higher impedance, narrower trace. |
| 100 Ω on 1.6 mm FR-4 | 1.600 mm | 4.3 | 0.658 mm | 25.9 mil | 2.981 | About as high as a microstrip goes before the trace becomes too narrow to etch reliably. |
What the model assumes, and where it stops being true
A microstrip is a trace on the outside of a board with a reference plane under it and air above. Its characteristic impedance is set almost entirely by the ratio of the trace width to the height of the dielectric beneath it, together with the laminate’s permittivity. Double both the width and the height and the impedance barely moves; change either one alone and it moves a lot. That is why a 50 Ω line on a 1.6 mm two-layer board has to be 3.07 mm wide, while the same 50 Ω over a 0.2 mm prepreg on a four-layer board is only 0.354 mm.
Effective permittivity, and why the signal is faster than you expect. Part of the field between the trace and the plane runs through the laminate and part through the air above, so the wave sees an average of the two. That average is the effective permittivity, and it is always between 1 and εᵣ — 3.261 here, against a laminate value of 4.3. Propagation delay is √εeff/c, which works out at 6.023 ps/mm or 153 ps/inch on FR-4 — the figure every signal-integrity rule of thumb is built from. It also means the guided wavelength is shorter than the free-space one by the same factor, which matters as soon as a trace is a noticeable fraction of a wavelength long.
The accuracy claim, honestly. Hammerstad’s equations are a curve fit to a quasi-static solution and are usually quoted as good to about 1%. That was checked here rather than repeated: the page’s model was compared against a two-dimensional finite-volume field solver written from scratch for the purpose — Laplace’s equation on the cross-section, once with the dielectric and once without, capacitance from the field energy — over six geometries from w/h = 0.6 to w/h = 3.75. The largest disagreement in impedance was 1.6%. Outside w/h of 0.05 to 20 the fit is not supported and this page says so rather than printing a number it cannot stand behind. The IPC-2141 equation is shown alongside as a cross-check because it is what many fabrication guides quote, but independent measurement puts it inside about 2% only near 50 Ω, valid over roughly 0.1 < w/h < 2 and εᵣ under 15, and returning negative impedances above w/h of 7.5.
What this model does not include. Solder mask over the trace lowers the impedance by a couple of ohms. Etching gives a trapezoidal cross-section rather than a rectangle. εᵣ for FR-4 is not one number — it depends on the resin content of that particular prepreg and falls with frequency, and a fab’s “4.3” may be anything from 3.9 to 4.6. Conductor and dielectric loss are ignored entirely. A trace with a plane above it as well as below is a stripline, which has a different equation, and a differential pair’s impedance depends on the gap between the two traces as well. For anything that has to be right to a few per cent, send the stack-up to the board house and use the impedance their solver returns — they will adjust the etched width to hit your target and tell you what they changed.
Current-carrying width is a different question with a different answer: see the PCB trace width calculator. If the line has to drive a mismatched load, the VSWR and return loss converter turns the mismatch into return loss, and the L-network matching calculator matches it out. For the wavelength in free space rather than on the board, the antenna length calculator.
Frequently asked questions
How wide is a 50 Ω trace on FR-4?
It depends entirely on how far the ground plane is below it. On a 1.6 mm two-layer board it is about 3.07 mm; over a 0.8 mm dielectric about 1.51 mm; over a 0.2 mm prepreg on a four-layer stack-up only 0.354 mm. The width alone means nothing without the height under it.
What is effective permittivity?
The permittivity the electromagnetic wave actually experiences, given that some of the field runs through the laminate and some through the air above the trace. It is always between 1 and the laminate’s εᵣ — 3.261 for the example on this page — and it is what sets the propagation delay and the guided wavelength.
How fast does a signal travel on a PCB trace?
About 55% of the speed of light for a microstrip on FR-4, which is 6.02 ps per mm or roughly 153 ps per inch. A stripline buried between two planes is slower, because all of its field is in the laminate.
Does copper thickness change the impedance?
Yes, a little. Thicker copper makes the trace electrically wider and lowers the impedance — going from 1 oz to 2 oz on a 50 Ω line costs roughly a couple of ohms. This page applies Hammerstad and Jensen’s correction for it rather than ignoring it.
Can I use this for an inner-layer trace?
Only if that trace has a plane on one side. A trace between two planes is a stripline, with a different equation and a lower impedance for the same width, and this page does not model it. What it does model is the usual four-layer case: a signal on an outer layer with the plane on the layer immediately beneath.
Why does my board house give a different number?
Because they run a two-dimensional field solver on your actual stack-up, with the real prepreg εᵣ, the solder mask, the trapezoidal etch profile and the copper roughness. Their number is the one to build to. Use this page to get the design close and to see which way each variable moves the answer.
Related calculators
References
- Hammerstad EO. Equations for microstrip circuit design. Proceedings of the 5th European Microwave Conference, Hamburg, 1975, pp. 268–272 — the closed forms this page uses, quoted and measured against a field solver in “Microstrip formulas comparison” (f4inx.github.io).
- Qucs project. Technical documentation — single microstrip line. The Hammerstad and Jensen strip-thickness correction used here: ΔW₁ = (t/πh)·ln(1 + 4e/[(t/h)coth²√(6.517u)]), ΔWᵣ = ½ΔW₁(1 + sech√(εᵣ − 1)), with W + ΔW substituted into the impedance and permittivity equations.
- IPC. IPC-2141A, Design guide for high-speed controlled impedance circuit boards (the 1996 IPC-2141 revised). Its single microstrip equation, Z₀ = 87/√(εᵣ+1.41) · ln[5.98h/(0.8w+t)], is shown here only as a cross-check: independent measurement puts it inside about 2% near 50 Ω but valid only over roughly 0.1 < w/h < 2 and 1 < εᵣ < 15.
- Pozar DM. Microwave Engineering, 4th ed. Wiley, 2012. §3.8 on microstrip (the quasi-TEM model, effective permittivity and the design equations) and §2.3 on the terminated lossless line — reflection coefficient, standing wave ratio and return loss.