MOSFET Loss Calculator

MOSFET Loss Calculator (DC-DC Converters)

Estimate a switching MOSFET’s conduction, switching and output-capacitance losses from datasheet values, the gate-drive power, and the junction temperature from θJA or θJC + θCS + θSA.

MOSFET power loss

Datasheet values → losses, Tj
The drain-source voltage while off: the input voltage in a buck high side.
The drain current at the switching edges: roughly the inductor current.
Over the whole period. Buck high side: √D × Iout; the converter designer pages give it.
At your gate drive voltage. Use the figures from your part’s datasheet; typical values vary widely between manufacturers.
From the datasheet’s normalised RDS(on)-versus-Tj curve at your expected junction temperature; about 1.5 near 100–125 °C for many silicon MOSFETs.
Current rise plus voltage fall. Datasheet tr is only a rough proxy.
Voltage rise plus current fall. Datasheet tf is only a rough proxy.
At your gate drive voltage. Use the figures from your part’s datasheet; typical values vary widely between manufacturers.
At the switched voltage; use the energy-related Co(er) if the datasheet gives it.
Measured on a JEDEC JESD51 test board; your board may differ widely.
The interface: pad or grease.
Usually 150 or 175 °C. Use the figures from your part’s datasheet; typical values vary widely between manufacturers.
The MOSFET switches an inductive load clamped by a diode, the case the loss formulas assume. The dots show the switched current while the MOSFET is on; when it is off, the current circulates through the diode. The MOSFET turns amber at 85 % of its maximum junction temperature and red at or above it.
1.167WExample

High side of a 48 V to 12 V, 10 A synchronous buck at 200 kHz: 5 A RMS, 5 mΩ × 1.5, 10 ns + 8 ns transitions, 30 nC at 10 V, 500 pF Coss, θJA 40 °C/W, 50 °C ambient

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MOSFET losses and junction temperature

Pcond = Irms²·RDS(on),25·kT; Psw = ½·V·I·(ton + toff)·f; PCoss ≈ ½·Coss·V²·f; Pgate = Qg·VGS·f; Tj = Ta + (Pcond + Psw + PCoss)·θ
kT
RDS(on) at the junction temperature ÷ RDS(on) at 25 °C
ton, toff
the full turn-on and turn-off transitions: current rise plus voltage fall, and voltage rise plus current fall
θ
θJA, or θJC + θCS + θSA with a heatsink

Worked example

High side of a 48 V to 12 V, 10 A synchronous buck at 200 kHz: 5 A RMS, 5 mΩ × 1.5, 10 ns + 8 ns transitions, 30 nC at 10 V, 500 pF Coss, θJA 40 °C/W, 50 °C ambient
Conduction = 5² × 0.005 × 1.5 = 0.1875 W
Switching = ½ × 48 × 10 × 18 ns × 200 kHz = 0.864 W
Coss = ½ × 500 pF × 48² × 200 kHz = 0.1152 W
MOSFET total = 1.167 W; gate drive 0.06 W in the driver
Tj = 50 + 1.1667 × 40 = 96.7 °C

Where a switching MOSFET’s losses come from

Conduction. While it is on, the MOSFET is a resistor: the loss is the RMS current squared times RDS(on). RDS(on) rises with temperature — a silicon MOSFET’s is typically about half as much again at 100–125 °C as at 25 °C — so take the factor from the datasheet’s normalised curve at the junction temperature you expect, then check it against the result and adjust. Use the RMS current, not the average: for a buck’s high side it is √D times the load current, which the buck converter designer gives directly.

Switching. In a hard-switched converter with an inductive load, the current and voltage overlap during each transition. With the current rising first and then the voltage falling (and the reverse at turn-off), each transition dissipates ½·V·I times its duration, whatever the split between the two ramps. This is the model in TI’s SLUA618A gate-driver guide. The transition times depend on your gate driver and gate resistance far more than on the datasheet’s tr and tf, which are measured in the manufacturer’s test circuit; treat them as a starting point and measure on the board. The chart shows how this loss grows in proportion to frequency while conduction loss stays put: the crossing is where faster switching stops paying.

Output capacitance. At every hard turn-on the MOSFET discharges its own Coss through its channel. ½·Coss·V²·f is an approximation because Coss falls steeply with voltage; the datasheet’s energy-related Co(er) is the right value when given.

Gate drive. Charging and discharging the gate takes Qg·VGS per cycle from the drive supply, and it is dissipated in the driver, the external gate resistor and the MOSFET’s internal gate resistance — mostly not in the die. It is shown for the driver’s budget and kept out of the junction temperature.

Temperature. Tj = Ta + P × θ. A datasheet θJA is measured on a JEDEC JESD51 test board in still air and is only a comparison figure; on a heatsink use θJC + θCS + θSA. To size a heatsink for a target temperature, use the heatsink thermal resistance calculator. For a whole three-phase bridge, the BLDC inverter loss calculator.

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Frequently asked questions

How do you calculate MOSFET conduction loss?

RMS drain current squared × RDS(on) at the operating temperature. 5 A RMS through 5 mΩ × 1.5 is 0.1875 W.

How do you calculate MOSFET switching loss?

½ × V × I × (turn-on time + turn-off time) × switching frequency. 48 V, 10 A, 18 ns in total at 200 kHz gives 0.864 W.

Is gate charge loss dissipated in the MOSFET?

Mostly not. Qg × Vgs × f is drawn from the gate-drive supply and dissipated in the driver’s output resistance, the external gate resistor and the MOSFET’s internal gate resistance.

How do you calculate the junction temperature of a MOSFET?

Ambient temperature + dissipated power × thermal resistance. 1.167 W on a 40 °C/W path at 50 °C ambient gives 96.7 °C.

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References

  1. Balogh L. Fundamentals of MOSFET and IGBT Gate Driver Circuits. Texas Instruments application report SLUA618A, revised October 2018. Switching loss V·I·(t2 + t3) ÷ 2T per transition; gate-drive power QG·VDRV·fDRV, dissipated in the gate-drive path, not in the MOSFET.
  2. Erickson RW, Maksimović D. Fundamentals of Power Electronics, 3rd ed. Springer, 2020. Ch. 2 (inductor volt-second and capacitor charge balance, ripple), Ch. 5 (the CCM–DCM boundary), Ch. 8, Table 8.2 (right-half-plane zero: D′²R/L for the boost, D′²R/(DL) for the buck-boost).
  3. JEDEC JESD51-2A. Integrated Circuits Thermal Test Method Environmental Conditions — Natural Convection (Still Air). JEDEC Solid State Technology Association, 2008. The conditions under which a datasheet θJA is measured.