Buck Converter Designer
Buck Converter Designer
Design the power stage of a step-down (buck) converter: duty cycle, inductance, peak and RMS currents, minimum output capacitance and ESR for a ripple target, the CCM/DCM boundary, and the nearest standard inductor and capacitor.
Buck power stage
12 V in, 5 V out at 2 A, 500 kHz, 30% ripple, 20 mV output ripple, ideal switches
Buck converter power stage (CCM)
- D
- duty cycle, from volt-second balance on the inductor; with both drops at 0 it is Vo/Vin
- ΔIL
- inductor ripple, peak to peak = ripple % × output current
- Vd, Vsw
- diode forward drop and switch on-state drop (0 = ideal)
- ΔV
- output ripple target, peak to peak
- f
- switching frequency
Worked example
12 V in, 5 V out at 2 A, 500 kHz, 30% ripple, 20 mV output ripple, ideal switches
D = 5 ÷ 12 = 41.67%; on-time 833.3 ns
ΔIL = 0.30 × 2 = 0.60 A peak to peak
L = (12 − 5) × 0.4167 ÷ (500,000 × 0.60) = 9.722 µH → use 10 µH (E12, rounded up)
With 10 µH: ripple 583.3 mA, peak 2.292 A; the inductor's saturation current must be above that
Cmin = 0.60 ÷ (8 × 500,000 × 0.020) = 7.5 µF → 10 µF (E6, after DC-bias derating); ESR ≤ 0.020 ÷ 0.60 = 33.33 mΩ
Designing the buck power stage
A buck converter chops the input with a switch and smooths it with an inductor and a capacitor. In continuous conduction mode (CCM) the inductor current never falls to zero, and volt-second balance on the inductor sets the duty cycle: ideally D = Vout/Vin. A diode drop and a switch drop both push D up, because the switch has to stay on longer to deliver the same average voltage. Set the diode and switch drops to 0 for an ideal (synchronous, lossless) design; enter them to see how a Schottky or a MOSFET’s I·RDS(on) drop stretches the duty cycle.
Choosing the ripple. The inductance follows from how much ripple you allow. A ripple of about 30% of the load current is the usual compromise: much less needs a large, slow inductor; much more raises the peak current, the RMS losses and the output ripple. In the example, 30% of 2 A is 0.60 A, which needs 9.722 µH; the next E12 value up, 10 µH, gives 583.3 mA of ripple and a 2.292 A peak. Rounding the inductor up can only lower the ripple and the peak. Choose a part whose saturation current is comfortably above the peak and whose RMS (heating) rating is above the RMS figure.
Design at the maximum input. The chart shows why: ripple grows as the input rises, because the inductor sees a larger voltage for most of the period. If your input varies, enter the highest input voltage and read the peak current there.
Output capacitor. The capacitor absorbs the triangular ripple current. If its capacitance alone set the ripple, Cmin = ΔIL/(8·f·ΔV); if its ESR alone set it, ESR ≤ ΔV/ΔIL. A real capacitor has both, so meet both with margin, and remember that a ceramic capacitor can lose half or more of its capacitance at its working DC voltage. The input capacitor carries a pulsed current with the RMS value shown, largest at 50% duty.
CCM and DCM. With a diode (or a controller that blocks reverse current), the inductor current reaches zero when the load falls below half the ripple, and the converter enters discontinuous mode (DCM), where these formulas no longer hold. A synchronous buck in forced-PWM mode stays in CCM with negative inductor current at light load. For the losses in the switches, use the MOSFET loss calculator; for the resistive basics, the Ohm’s law calculator.
Frequently asked questions
How do you calculate the inductor for a buck converter?
L = (Vin − Vout) × D ÷ (f × ΔIL), with D = Vout/Vin and ΔIL the ripple you allow, typically about 30% of the load current. For 12 V to 5 V at 2 A and 500 kHz that is 9.722 µH; use 10 µH.
What is the duty cycle of a buck converter?
Vout ÷ Vin for an ideal converter. With a diode drop Vd and a switch drop Vsw it becomes (Vout + Vd) ÷ (Vin − Vsw + Vd), a little higher.
How much output capacitance does a buck converter need?
At least ΔIL ÷ (8 × f × ΔV) for the capacitive ripple, and an ESR no higher than ΔV ÷ ΔIL. For 0.6 A of ripple at 500 kHz and 20 mV that is 7.5 µF and 33.33 mΩ, before DC-bias derating.
Should I design at minimum or maximum input voltage?
Maximum. The inductor ripple, and so the peak current and the output ripple, are largest at the highest input voltage.
When does a buck converter go into DCM?
When the load current falls below half the peak-to-peak ripple, if the rectifier cannot carry reverse current. With the E12 inductor in the example that is below 291.7 mA.
Related calculators
References
- Erickson RW, Maksimović D. Fundamentals of Power Electronics, 3rd ed. Springer, 2020. Ch. 2 (inductor volt-second and capacitor charge balance, ripple), Ch. 5 (the CCM–DCM boundary), Ch. 8, Table 8.2 (right-half-plane zero: D′²R/L for the boost, D′²R/(DL) for the buck-boost).
- Hauke B. Basic Calculation of a Buck Converter’s Power Stage. Texas Instruments application report SLVA477B, revised August 2015. Inductance, COUT(min) = ΔIL ÷ (8·fS·ΔVOUT) and the ESR ripple term.
- IEC 60063:2015. Preferred number series for resistors and capacitors. The E6, E12 and E24 series used for the suggested standard parts.