Op-Amp Capacitive Load Stability Calculator
Op-Amp Capacitive Load Stability Calculator
Why a buffer oscillates when you put a cable on it: the amplifier’s open-loop output resistance and your load capacitance make a pole inside the feedback loop. Get the frequency of that pole, the phase margin left, the overshoot and ringing that follow, the largest capacitance stable at your gain, and the isolation resistor that fixes it — with what the resistor costs.
Phase margin against load capacitance, and the isolation resistor that fixes it
a 10 MHz op-amp with 50 Ω of open-loop output resistance, wired as a unity-gain buffer, driving 1 nF with no isolation resistor
The output pole is inside the loop
(1 + s·RisoCL) ÷ (1 + s·(Ro+Riso)CL)
so T(s) = (ωta/s)·β·(1 + s/ωz) ÷ (1 + s/ωp), β = 1/G, ωx = ωtaβ
|T| = 1 is a quadratic in ω²:
ωc² = [−(1 − ωx²/ωz²) + √((1 − ωx²/ωz²)² + 4ωx²/ωp²)]·ωp²/2
φm = 90° − atan(ωc/ωp) + atan(ωc/ωz)
CL,max = 1 ÷ (Ro·ωx·sin φ·tan φ)
- ω_p
- the output pole, 1 ÷ ((R_o + R_iso)·C_L). Inside the loop, which is the whole problem
- ω_z
- the zero the isolation resistor adds, 1 ÷ (R_iso·C_L). Always above the pole, which is why it gives phase back
- ω_x
- where the loop would cross with no load capacitance: the gain-bandwidth product divided by the closed-loop gain
- β
- the feedback factor, 1 ÷ noise gain. A unity-gain follower has β = 1 and is the worst case
Worked example
a 10 MHz op-amp with 50 Ω of open-loop output resistance, wired as a unity-gain buffer, driving 1 nF with no isolation resistor
With no capacitance the loop would cross at the full gain-bandwidth product, 10 MHz. 50 Ω into 1 nF puts a pole at 1 ÷ (2π × 50 × 1 nF) = 3.183 MHz — well below that, and inside the loop
Solving |T| = 1 with that pole present gives a crossover of 5.212 MHz — the pole has pulled it down from 10 MHz, but not nearly far enough to get clear of it
The phase margin is 90° − atan(5.212 MHz ÷ 3.183 MHz) = 31.4°. That corresponds to ζ = 0.282, so a step overshoots by about 39.7% and rings at 5.413 MHz. This is the classic 'my buffer went unstable when I put a cable on it'
The largest capacitance that would still leave 45° at this gain is 1 ÷ (R_o·ω_x·sin φ·tan φ) = 450.2 pF — so 1 nF is 2.22 times too much
An isolation resistor of 9.63 Ω restores 45°; the nearest E24 value at or above it is 10 Ω. The cost is that the load now sees a bandwidth of 16.53 MHz and, into 10 kΩ, a DC gain error of 0.0962% — negligible here, and not negligible into a low-impedance load
The same amplifier at four closed-loop gains
| Noise gain | Crossover with no C_L | Phase margin at 1 nF | Largest C_L for 45° | Isolation resistor for 45° at 1 nF |
|---|---|---|---|---|
| 1 V/V | 10 MHz | 31.4° | 450.2 pF | 9.63 Ω |
| 2 V/V | 5 MHz | 43.0° | 900.3 pF | 2.367 Ω |
| 10 V/V | 1 MHz | 73.3° | 4.502 nF | none needed |
| 100 V/V | 100 kHz | 88.2° | 45.02 nF | none needed |
Why the buffer oscillates when you put a cable on it
Feedback works by comparing the output with the input. If something delays the output on its way back to the comparison, the comparison is made against out-of-date information — and if the delay reaches half a cycle at the frequency where the loop gain is one, the feedback becomes positive and the amplifier oscillates. A capacitor on the output does exactly that, because the amplifier’s own output resistance and that capacitor form a low-pass filter, and the feedback is taken from after it.
The number nobody has: open-loop output resistance. The closed-loop output impedance of an op-amp is tiny — milliohms — because feedback divides the open-loop value by the loop gain. But the pole that causes this problem is formed by the OPEN-LOOP value, which is tens of ohms and is the one number this calculation needs that most data sheets do not print as a figure. Where there is a graph of open-loop output impedance against frequency, read the flat mid-band part of it. Failing that, 10 to 100 Ω brackets almost everything, and a rail-to-rail CMOS output stage is usually at the top of that range.
Gain is the cheapest fix and nobody uses it. The loop crosses at the gain-bandwidth product divided by the closed-loop gain, so a stage with a gain of ten crosses a decade lower than a follower — and the output pole, which has not moved, is then a decade further above crossover. The capacitance a stage will tolerate rises roughly as the SQUARE of its noise gain. If the circuit can be rearranged so the buffer has gain, the problem often disappears without any extra components.
What the isolation resistor really does. Putting a resistor between the output pin and the capacitance, with the feedback still taken at the pin, does two things at once. It moves the pole DOWN, to 1 ÷ (2π(R_o + R_iso)C_L), which on its own would be worse. And it adds a zero at 1 ÷ (2π·R_iso·C_L), which is always above the pole, and that zero gives the phase back before crossover. The net effect is a phase margin that rises monotonically with R_iso, which is why the page can find the value you need by bisection. The cost is real and is in two parts. The load is now outside the loop, so any current it draws produces an uncorrected drop in the resistor — a DC gain error of R_iso ÷ (R_iso + R_load). And the bandwidth AT THE LOAD is now set by R_iso and C_L together, not by the amplifier. Both are reported above.
When the resistor’s DC error is unacceptable, the standard alternative keeps the DC path inside the loop: a second feedback network from the load back to the inverting input, in parallel with the fast feedback from the pin, so the loop controls the load at low frequency and the pin at high frequency. That needs two more components and a second stability calculation, and it is beyond what this page models.
Where to look next. The non-inverting amplifier calculator owns the two speed limits that catch people out for a different reason — closed-loop bandwidth from the gain-bandwidth product, and full-power bandwidth from the slew rate — and those are large-signal limits that this page’s small-signal model cannot see. The inverting amplifier calculator has the noise-gain point in its own terms. For the general question of what a phase margin means, and for a loop with more poles and zeros than this one, the control loop stability calculator takes an arbitrary loop gain and draws its Bode plot.
Frequently asked questions
My data sheet does not give an open-loop output resistance. What do I use?
Look for a graph titled open-loop output impedance against frequency and read the flat region — that is the value. If there is no such graph, 10 to 100 Ω covers most parts: bipolar output stages tend towards the lower end, rail-to-rail CMOS towards the upper. Run this page at both ends of that range; if the answer changes your design decision, the number is worth measuring, which you can do by driving a known resistive load and observing the change in open-loop gain.
Why is a unity-gain follower the worst case?
Because the feedback factor is one, so the loop gain is the full open-loop gain and crosses 0 dB at the full gain-bandwidth product — the highest frequency it ever crosses at. The output pole does not move when you change the closed-loop gain, so the follower is the configuration in which crossover is closest to that pole. Raise the noise gain and the crossover falls in proportion, and the tolerable capacitance rises roughly as the square of the gain.
Is a series resistor the same as an isolation resistor?
Only if the feedback is still taken at the amplifier’s output pin, before the resistor. That is what puts the zero inside the loop. If you take the feedback from AFTER the resistor — at the load — the resistor is inside the loop, no zero appears, and you have made the problem worse rather than better. Which side the feedback comes from is the whole distinction.
How much capacitance can I actually hang on a buffer?
The page gives the number for your amplifier and your target margin, and it is usually smaller than people expect: a 10 MHz amplifier with 50 Ω of output resistance manages about 450 pF at unity gain for 45°. A metre of coaxial cable is around 100 pF, so four or five metres is the limit — which is exactly why long cable runs are driven by amplifiers specified for the job or through an isolation resistor.
Does the overshoot figure apply to a large step as well?
No. It is a small-signal result derived from the phase margin, and it describes the linear response. A large step also runs into the slew rate and possibly into output current limit, and with a capacitive load the current needed is C·dV/dt, which for a fast edge into a nanofarad is more than many amplifiers can supply. The large-signal recovery can look quite different from the small-signal one, and usually worse.
Can I fix this with a capacitor across the feedback resistor instead?
Sometimes — a feedback capacitor adds a zero to the feedback network and can recover phase, and in an inverting stage it is a standard technique. But it also rolls off the closed-loop response, and in a unity-gain follower there is no feedback resistor to put it across. The isolation resistor works in every configuration, which is why it is the default answer.
Related calculators
References
- J. G. Graeme, Optimizing Op Amp Performance, McGraw-Hill 1997 (ISBN 0-07-024522-3), and the same author’s Amplifier Applications of Op Amps. The standard book-length treatment of the open-loop output resistance forming a pole with the load capacitance, of the isolation resistor’s pole-zero pair, and of the in-the-loop compensation alternative. Title, author and publisher verified; the book itself was not fetched and nothing is quoted from it. Every formula on this page was derived here and checked against a numerical solve of |T(jω)| = 1 over 500 randomly drawn amplifiers.
- Analog Devices, MT-033 tutorial, Voltage Feedback Op Amp Gain and Bandwidth, and the discussion of capacitive load drive in the same tutorial series. The relationship between gain-bandwidth product, noise gain and crossover frequency used here. Cited by document number; the derivation above was carried out independently and checked against a numerical solve of |T(jω)| = 1.
- R. W. Erickson and D. Maksimović, Fundamentals of Power Electronics, 3rd edition, Springer 2020, §9.4.2, for the relation between phase margin and closed-loop Q used to turn the margin into an overshoot: Q = √(cos φ) ÷ sin φ, with φ = 52° giving Q = 1 and φ = 76° giving Q = 0.5. Verified against the published chapter and, independently, against a numerical crossover solve.