Soft-Start Capacitor Calculator

Soft-Start Capacitor Calculator

The capacitor on a regulator’s soft-start pin, the ramp time it gives and — the part most pages leave out — the inrush the ramp still permits: C_out × dV/dt plus the load current, checked against the converter’s current limit, which is the whole reason the pin is there.

Soft-start ramp and inrush

C_SS ⇄ ramp time, and the inrush it allows
The constant current the controller pushes out of the soft-start pin. 1–10 µA is usual. Use the figures from your part’s datasheet; typical values vary widely between manufacturers.
The ramp ends when the soft-start pin reaches this. 0.6 V, 0.8 V and 1.2 V are the common values, and it is the same reference the feedback divider is set against. Use the figures from your part’s datasheet; typical values vary widely between manufacturers.
Small: tens of nanofarads for a few milliseconds. A ceramic part is fine, but watch its DC bias derating — a 22 nF X7R is still 22 nF at 0.6 V, a 1 µF X5R in an 0402 case may not be.
1–10 ms is typical. Longer is gentler on the supply but leaves the output out of regulation for longer, and some sequencing requirements put an upper bound on it.
Everything on the rail, including the capacitance inside the loads and any bulk electrolytic — not just what the converter’s own design called for. This is what the inrush charges.
What the load takes while the rail is coming up. Many loads take nothing until the rail is valid; some take their full current from the start.
The switch or inductor current limit, which is what actually stops the converter. If the start-up current reaches it, the converter folds back or hiccups and may never finish starting. Use the figures from your part’s datasheet; typical values vary widely between manufacturers.
Top: the regulator, the soft-start capacitor on its SS pin, and the output capacitance the ramp has to charge. Bottom: the output ramp itself, drawn from the same numbers — the slope is Vout ÷ t_SS and the current the output capacitance draws is C × that slope, constant for the whole ramp. The moving dots on the output are the total current during start-up, inrush plus load. The soft-start capacitor turns amber when that total passes 80 % of the converter's current limit and red at or past it. The waveform is a drawing of the model, not a measurement.
2.2msExample

a controller with a 6 µA soft-start current and a 0.6 V reference, a 22 nF capacitor, a 5 V rail with 680 µF on it and 2.0 A of load already drawing, against a 4.5 A current limit

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The ramp, and the inrush it still permits

tSS = CSS · VREF ÷ ISS     CSS = tSS · ISS ÷ VREF
dV/dt = Vout ÷ tSS
Iinrush = Cout · dV/dt = Cout·Vout ÷ tSS
Itotal = Iinrush + Iload   must stay below   Ilimit
tSS,min = Cout·Vout ÷ (Ilimit − Iload)
I SS
the constant current out of the soft-start pin, from the controller’s data sheet
V REF
the internal reference. The ramp ends when the pin reaches it, and the output is in regulation from then on
C out
everything on the rail, including capacitance inside the loads — not only what the converter’s design called for
I limit
the switch or inductor current limit. Reaching it during start-up is what turns a slow ramp into a converter that hiccups and never comes up

Worked example

a controller with a 6 µA soft-start current and a 0.6 V reference, a 22 nF capacitor, a 5 V rail with 680 µF on it and 2.0 A of load already drawing, against a 4.5 A current limit
tSS = 22 nF × 0.6 V ÷ 6 µA = 2.2 ms
The output therefore ramps at 5 V ÷ 2.2 ms = 2.273 kV/s, or 2.273 V per millisecond
Charging 680 µF at that rate takes C·dV/dt = 1.545 A — on top of the 2.0 A the load is already drawing
Total during the ramp: 3.545 A, which is 78.8% of the 4.5 A limit, leaving 954.5 mA of headroom
The shortest ramp that would still fit inside the limit is Cout·Vout ÷ (Ilimit − Iload) = 1.36 ms, which needs 13.60 nF
Put another way: at this ramp rate the converter could start into at most 1.1 mF of output capacitance before the limit stopped it

What the soft-start pin does and does not protect

InrushWhere it flowsDoes soft-start help?
Charging the output capacitanceconverter output → C_outYes — this is exactly what it limits
Load current at start-upconverter output → loadNo — it adds to the inrush and eats the same headroom
Charging the INPUT bulk capacitancesupply → C_inNo — that happens before the converter even starts
Hot-plug surge into the connectorsupply → everythingNo — an NTC, a series FET or a hot-swap controller does that
Pre-biased output being pulled downC_out → converterOnly if the part supports pre-bias start-up; otherwise it sinks current
Rows three and four are the common disappointment: a designer adds a soft-start capacitor, measures the supply current at power-on and finds nothing has changed, because the surge being measured is the input bulk capacitor charging through the connector. The soft-start pin never sees it.

Common soft-start pin figures

FamilyI_SSV_REF22 nF gives
Typical 6 µA / 0.6 V controller6 µA0.6 V2.20 ms
2 µA / 0.8 V controller2 µA0.8 V8.80 ms
10 µA / 1.2 V controller10 µA1.2 V2.64 ms
Fixed internal ramp (no pin)——set in switching cycles, not adjustable
The last row is worth checking for before buying a capacitor: several modern step-down converters, the TPS54360 among them, have a fixed internal digital soft start that ramps the reference over a set number of switching cycles and no soft-start pin at all. There the ramp is what it is, and the output capacitance has to be sized to suit it — which is what the “largest output capacitance this ramp can start into” figure above is for.

A ramp, and the current it still lets through

Left to itself, a switching converter starting into a discharged output capacitor is a short circuit. The loop sees zero volts where it wants five, demands everything it has, and the only thing that stops it is the current limit — which means the converter starts in current limit, the inductor runs at its peak, and the output comes up as fast as the limit allows with whatever overshoot the loop’s recovery produces. The soft-start pin replaces the reference with a ramp: a constant current ISS charges CSS, the error amplifier follows whichever of the two is lower, and the output rises in proportion until the pin reaches VREF. The time is exactly CSS·VREF/ISS, and nothing else affects it.

The ramp does not make the inrush go away — it sets it. A capacitor charging at a constant dV/dt draws a constant current, i = C·dV/dt, for the whole ramp. So the output capacitance draws Cout·Vout/tSS from the first moment to the last, and whatever the load is taking sits on top of that. The sum is what the converter’s current limit sees. Get it wrong and the symptom is not a bang: the converter enters current limit part way up the ramp, the output stops following the soft-start pin, the pin reaches VREF anyway, and depending on the part you either get a slow non-linear rise or a hiccup loop in which the converter retries forever and never comes up. Doubling the output capacitance halves the ramp rate you are allowed. This page prints that limit directly.

What the ramp time should be. Long enough that the inrush plus the start-up load fits under the limit with margin — the capacitors, the limit itself and the reference all have tolerances, and the limit usually falls with temperature. Short enough that nothing downstream times out: supervisors, power-good windows and sequencing controllers all have their own patience. A few milliseconds satisfies both in most designs. If a rail has to come up in a fixed order, the soft-start pin is also the natural place to hold it: pulling the pin low keeps the converter off.

What soft-start does not cover. The converter’s own input bulk capacitance is charged before the converter starts switching at all, straight through the connector or the upstream switch, and no amount of soft-start capacitance touches it. That surge needs an NTC inrush limiter, a series FET slewed by its own gate capacitor, or a hot-swap controller. Nor does soft-start help a converter that has to start into a pre-biased output unless the part explicitly supports it — some sink current to pull the rail down to their ramp, which is worse than doing nothing.

The energy that ends up in the output capacitance is ½CV², which the capacitor energy calculator gives for any rail; the buck converter designer sizes the inductor and output capacitance that this page then has to charge, and the RC time constant calculator covers the case where the ramp is an RC rather than a constant current.

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Frequently asked questions

How do you calculate the soft-start capacitor?

CSS = tSS × ISS ÷ VREF, with ISS the soft-start pin’s charging current and VREF the internal reference, both from the data sheet. For a 2.2 ms ramp with a 6 µA pin current and a 0.6 V reference that is 22 nF.

How much inrush current does a soft-start ramp allow?

Cout × Vout ÷ tSS, plus whatever the load is drawing at the time. The ramp does not remove the inrush; it decides how large it is. On this page’s example, 680 µF ramping to 5 V in 2.2 ms draws 1.545 A of charging current for the whole ramp.

Why does my converter hiccup instead of starting?

Almost always because the inrush plus the start-up load exceeds the current limit. The converter enters limit part way up the ramp, cannot follow the soft-start reference, and the protection retries. Lengthen the ramp, cut the output capacitance, or arrange for the load to draw nothing until the rail is valid. This page prints the shortest ramp that fits inside the limit.

Does the soft-start capacitor limit the inrush from the mains or the battery?

No. It only controls the converter’s own output ramp. The input bulk capacitance is charged before the converter starts switching, through the connector or the upstream switch, and needs a separate inrush limiter — an NTC thermistor, a slewed series FET, or a hot-swap controller.

What happens if the soft-start capacitor is too large?

The rail takes longer to come up. That is harmless for the converter but not for anything watching: supervisors and power-good windows have time-outs, and a sequenced system may declare a fault. It also means a longer period in which the output is below its regulation point and the loads are running undervoltage.

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References

  1. Texas Instruments, Understanding Soft Start of TPS56837, application note SLUAAT3, November 2023. Gives TSS = CSS × VREF ÷ ISS and works it for a 6 µA pin current charging 22 nF to a 600 mV reference — 2.2 ms, which is this page’s default example and matches its simulation.
  2. Texas Instruments, AN-1815: LDOs Ease the Stress of Start-Up, SNVA333A (September 2008, revised April 2013). The soft-start mechanism as a controlled rise time on the reference, and the statement that “the reduced dV/dt demands less in-rush current” — which is the relation this page makes quantitative.
  3. Feldman R. How to Measure and Determine Soft Start Timing When There Is No Soft Start Equation? Analog Devices, Analog Dialogue RAQ Issue 223, May 2024. Distinguishes a voltage soft start, where the time is linear in CSS as modelled here, from a current soft start, where the load current itself changes the timing and this page’s model does not apply.
  4. Texas Instruments, TPS54360 60-V Input, 3.5-A, Step-Down DC/DC Converter data sheet, §7.3.8 Internal Soft-Start: “ramps the reference voltage from zero volts to its final value in 1024 switching cycles”. Cited for the case this page cannot help with — a part with a fixed internal ramp and no soft-start pin.