DC-DC Efficiency Curve Calculator
DC-DC Efficiency Curve Calculator
Assemble a buck converter’s whole loss budget against load — MOSFET conduction and switching, gate drive, the rectifier, inductor DCR and core loss, capacitor ESR and the controller’s own quiescent current — and plot efficiency against load current. The shape is the teaching: fixed losses collapse light-load efficiency, I²R takes it away again at full load, and the peak is exactly where the two are equal.
The whole loss budget, and efficiency against load
a synchronous buck from 12 V to 3.3 V at 500 kHz with a 4.7 µH, 15 mΩ inductor, 12 and 6 mΩ MOSFETs, 20 nC of total gate charge on a 5 V driver, 20 ns of overlap, 300 pF of C_oss, 60 mW of core loss, 5 mΩ of capacitor ESR and a 1.0 mA controller, reported at 2 A out of a rated 5 A
Three groups, and a peak that follows from them
C = D·Rhs + (1−D)·Rls + DCR + ESR·D(1−D)
B = (1−D)·Vf + ½·Vin·(tr+tf)·fsw
A = QgVdrvfsw + ½CossVin²fsw + Pcore + VinIq + (ΔI²/12)(D·Rhs + (1−D)Rls + DCR) + ESR·(ΔI²/12)(1 + D)
η = VoIo ÷ (VoIo + Ploss), and dη/dIo = 0 at Io = √(A/C)
- ΔI
- the peak-to-peak inductor ripple, (V_in − V_o)·D ÷ (f_sw·L). In continuous conduction it does not change with load, which is why every term containing it is a FIXED loss
- √(A/C)
- the load at which efficiency peaks. The linear term B cancels out of the derivative entirely, so the rectifier’s forward drop and the switching overlap lower the whole curve without moving its peak
- ESR·D(1−D)
- the input capacitor, whose RMS current rises with load. Its exact RMS² is D(I_o² + ΔI²/12) − (D·I_o)², so it contributes to both C and A — the usual I_o√(D(1−D)) approximation drops the fixed part
Worked example
a synchronous buck from 12 V to 3.3 V at 500 kHz with a 4.7 µH, 15 mΩ inductor, 12 and 6 mΩ MOSFETs, 20 nC of total gate charge on a 5 V driver, 20 ns of overlap, 300 pF of C_oss, 60 mW of core loss, 5 mΩ of capacitor ESR and a 1.0 mA controller, reported at 2 A out of a rated 5 A
Duty cycle is 3.3 ÷ 12 = 27.50%, and the ripple is (12 − 3.3) × 0.2750 ÷ (500 kHz × 4.7 µH) = 1.018 A peak to peak. That ripple does not change with load, which is the key to everything below
The fixed losses add up to 135.3 mW: 50 mW of gate drive, 10.8 mW in the high-side C_oss, 60 mW of core loss, 12 mW of controller quiescent, and 2.51 mW from the ripple current flowing in the MOSFETs, the DCR and the capacitor ESR
The quadratic coefficient is 23.647 mΩ — 0.2750 × 12 mΩ on the high side plus 0.7250 × 6 mΩ on the low side plus 15 mΩ of DCR plus the input capacitor's share — and the linear coefficient is 60.00 mV, all of it the V–I overlap since the rectifier is synchronous
At 2 A that is 349.9 mW of loss against 6.6 W of output, so 94.97%
The peak is at √(A/C) = √(0.135307 ÷ 0.023647) = 2.392 A, where the efficiency is 95.02%. Across the load range the curve reads 90.60% at 10% of rated load, 95.01% at half and 94.14% at full — the classic shape, and the 4.42 points lost at light load are the fixed terms and nothing else
Where the same converter’s losses go, at four loads
| Load | Fixed (A) | Linear (B·I) | Quadratic (C·I²) | Total loss | Efficiency |
|---|---|---|---|---|---|
| 50 mA | 135 mW | 3 mW | 59.1 µW | 138 mW | 54.39% |
| 500 mA | 135 mW | 30 mW | 5.91 mW | 171 mW | 90.60% |
| 2.392 A | 135 mW | 144 mW | 135 mW | 414 mW | 95.02% |
| 2.5 A | 135 mW | 150 mW | 148 mW | 433 mW | 95.01% |
| 5 A | 135 mW | 300 mW | 591 mW | 1.03 W | 94.14% |
The shape of the curve, and what each part of it is made of
Every efficiency curve on every converter data sheet has the same shape: it climbs steeply out of nothing at light load, peaks somewhere in the middle third, and then sags towards full load. That shape is not a measurement artefact. It follows directly from the fact that the losses in a switching converter fall into exactly three groups.
Fixed losses do not care what the load is. Gate drive is Q_g·V_drv·f_sw. The high-side device’s output capacitance costs ½C_oss·V_in²·f_sw whether it is delivering an amp or a milliamp. The inductor’s core loss depends on the ripple current, and in continuous conduction the ripple current does not change with load. The controller draws its quiescent current regardless. Add the ripple’s own contribution to conduction loss — ΔI²/12 times the same resistances the load current sees — and you have a number of watts that is simply subtracted from the output whatever the output is. At 5% of rated load that number can be most of the loss, which is why the left-hand end of the curve collapses.
Quadratic losses take over at the top. Conduction loss in the MOSFETs and in the inductor’s DC resistance is I²R, and the input capacitor’s ESR loss is proportional to I² as well. Doubling the load quadruples these, which is why the curve sags at full load and why the thermal design is set by the top of the range even though the efficiency is best in the middle.
And the peak is exactly where those two are equal. Write the loss as A + B·I + C·I², put it into η = V_o I ÷ (V_o I + loss) and differentiate: the answer is I = √(A/C), and the linear term B disappears completely. So a diode’s forward drop and the switching overlap loss lower the whole curve without moving its peak, and the peak sits where A = C·I². The chart plots the fixed and quadratic shares of the total loss beside the efficiency for exactly this reason: their crossing is the peak, visibly, and it tells you immediately which way to push. Peak too low? The fixed losses are too small relative to conduction — spend on MOSFETs. Peak above your rated load? The fixed losses dominate — lower the switching frequency, which reduces three of the four fixed terms at once.
This page assembles; it does not re-derive. Each loss term has a page of its own on this site and those pages go much deeper. The MOSFET loss calculator takes one switching device at one operating point and gives its conduction, overlap and C_oss losses together with the junction temperature from θ_JA or θ_JC + θ_CS + θ_SA, and it sweeps them against switching frequency — which is the sweep this page does not do. The gate driver calculator splits the gate-drive power between the driver’s own output resistance, the external gate resistor and the MOSFET’s internal gate resistance, which matters because only the first of those heats the driver. The diode loss calculator handles the threshold-plus-resistance model and reverse recovery properly. The Steinmetz core loss calculator turns core material coefficients into the milliwatts this page asks you to type in. And the buck designer sizes the inductor and the capacitors in the first place and gives the CCM/DCM boundary. What none of them does is put all of it together against load current, which is the one view that shows the shape.
What the model leaves out, and where it stops being true. It assumes continuous conduction at every load, which is false below half the ripple current — and the error is in the pessimistic direction, because a converter allowed to go discontinuous stops circulating reverse current through the synchronous rectifier and its switching losses fall with the pulse rate. A controller with pulse-skipping or burst mode does better still at light load than anything this model can show. It takes R_DS(on) and V_f as constants, when both move with temperature and therefore with load. It uses a single overlap time for both transitions, which is exactly right when t_r = t_f and close otherwise. It ignores dead-time body-diode conduction, reverse recovery in the synchronous rectifier’s body diode, and the gate-charge loss in the driver’s own bootstrap circuit. And it says nothing about the control loop: the control loop stability calculator is where that lives.
Frequently asked questions
Why does efficiency collapse at light load?
Because the fixed losses do not fall with the load. Gate drive, the output capacitance loss, the core loss and the controller’s own consumption are the same at 50 mA as at 5 A, so as the output power falls they become a larger and larger fraction of it. The cure is to make them not fixed: pulse-skipping or burst mode stops the converter switching between bursts, which turns the per-cycle losses into something proportional to load. That is why a battery-powered design chooses a controller on its light-load behaviour rather than its peak efficiency.
Why does the peak not move when I change the diode?
Because a diode’s loss is V_f × I × (1 − D), which is LINEAR in load current, and the linear term cancels out of the derivative of the efficiency. It lowers the whole curve by the same fraction at every load without moving the current at which the curve peaks. Only the fixed losses and the quadratic losses move the peak — up if the fixed ones grow, down if the quadratic ones do.
Should I lower the switching frequency?
It is the most powerful single lever on light-load efficiency, because three of the four main fixed losses — gate drive, C_oss and the V–I overlap — are directly proportional to it, and core loss rises with it too. The cost is a larger inductor for the same ripple, a larger output capacitor for the same output ripple, and a slower control loop. Halve the frequency here and watch the left-hand end of the curve rise.
My converter’s data sheet shows better efficiency than this. Why?
Three usual reasons. The data sheet measures at 25 °C, where R_DS(on) is a third lower than at the junction temperature the part runs at. It uses the manufacturer’s own reference layout, with parasitic inductance that a real board rarely matches, so the real overlap time is longer than theirs. And it very often runs the converter in a light-load mode this model does not include. Putting R_DS(on) at temperature and a realistic overlap time into this page usually closes most of the gap.
Is the V–I overlap loss really ½·V_in·I·(t_r + t_f)·f?
It is the standard triangular-overlap approximation, and it is exactly right when the rise and fall times are equal — the exact expression uses the valley current at turn-on and the peak current at turn-off, and those average to the load current when t_r = t_f. It is the least certain term on the page in practice, not because the formula is poor but because the transition time depends on the gate drive, the gate resistance and the layout’s parasitic inductance rather than on anything in a data sheet.
Does this work for a boost converter?
The structure does — every loss is still fixed, linear or quadratic — but the coefficients are different, because in a boost the inductor carries the INPUT current rather than the output current and the switch conducts for D of the period rather than the rectifier. Do not use these numbers for a boost. The boost designer has the right RMS currents, and the same three-group reasoning applies once you have them.
Related calculators
References
- Texas Instruments, Basic Calculation of a Buck Converter’s Power Stage, application report SLVA477B. The duty cycle, inductor ripple, RMS current and capacitor relations that this page’s loss budget is assembled from, in their standard form. Document number and title verified against Texas Instruments’ own publication listing.
- R. W. Erickson and D. Maksimović, Fundamentals of Power Electronics, 3rd edition, Springer 2020, chapters 2 and 3 (steady-state equivalent circuit modelling and losses) and chapter 4 (switch realisation and switching loss). The source of the V–I overlap treatment and of the equivalent-circuit accounting of conduction loss used here.
- Infineon, MOSFET Power Losses Calculation Using the Data-Sheet Parameters, application note, and the same manufacturer’s OptiMOS design guides. The standard statement of the switching-loss and output-capacitance terms. Cited by title; both terms were checked here against a direct integration of the assumed waveform instead of being taken on trust.
- The RMS current expressions used on this page were verified numerically rather than quoted: a 400,000-point integration of the triangular inductor current over one switching period reproduces I_o² + ΔI²/12 for the inductor, D(I_o² + ΔI²/12) for the high-side switch, ΔI²/12 for the output capacitor and D(I_o² + ΔI²/12) − (D·I_o)² for the input capacitor — the last of which is exact, and larger than the widely quoted I_o√(D(1−D)) by exactly the ripple term.