Charge Pump Calculator

Charge Pump Calculator

Switched-capacitor voltage doubler, inverter and n-stage Dickson multiplier: the output voltage under load, the ripple, the efficiency, and the number that actually decides the design — the equivalent output resistance, 1/(f·C) per flying capacitor in the slow-switching limit, with the resistance-limited floor named as the other regime.

charge pump output

C, f, Iload → Vout and R_out
Used by the Dickson topology only. The ideal output is (n + 1) × Vin and there are n + 1 diodes in the path, so every extra stage costs another diode drop and another 1/(f·C) of output resistance.
Also the clock amplitude: a Dickson stage adds one clock swing per stage, and this page assumes the clock swings the full supply.
The capacitor that is charged in one half of the cycle and reconnected in the other. Its value and the switching frequency set the output resistance; its voltage rating must cover the node it sits on.
It cannot be lower than the resistance-limited floor 2·N·R below, no matter how large the flying capacitor is.
The capacitor across the output. It carries the load between charge packets, so it sets the ripple and nothing else.
Doubling it halves the slow-switching part of the output resistance and halves the ripple. It does not touch the resistance-limited floor.
0.2–0.4 V for a small Schottky, 0.6–0.7 V for a silicon diode. Enter 0 for an integrated pump, which uses MOSFET switches and has no diode drops at all. Use the figures from your part’s datasheet; typical values vary widely between manufacturers.
Switch or diode dynamic resistance plus the flying capacitor’s ESR, for one charge transfer. This is what sets the floor the output resistance cannot go below. Use the figures from your part’s datasheet; typical values vary widely between manufacturers.
The diode-capacitor ladder. D1 charges the flying capacitor from the input while its clock is low; when the clock goes high the capacitor's node is lifted by one clock swing and D2 pushes the charge on into the reservoir. A second stage appears when the Dickson topology is selected — an n-stage ladder repeats it n times. The inverter uses the same flying capacitor reconnected with its polarity reversed, which is not drawn, but its figures are the ones printed. The moving dots are the average input and output currents. The flying capacitor turns amber when the droop passes a fifth of the ideal output and red past a half.
9.167VExample

a discrete Schottky voltage doubler: 5 V in, 1 µF flying capacitor, 10 µF reservoir, 100 kHz, 20 mA load, 0.3 V per diode and 1.5 Ω per transfer path

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A charge pump is a source behind a resistor

Vout = n·Vin − ND·VF − Iout·Rout
RSSL = N ÷ (f·Cfly)    (slow-switching limit, one 1/f·C per flying capacitor)
RFSL = 2·ND·Rpath    (fast-switching limit, resistance-limited)
Rout ≈ √(RSSL² + RFSL²)
η = Vout ÷ (n·Vin)    because Iin = n·Iout exactly
ΔVpp ≈ Iout ÷ (f·Cres)
n
the ideal conversion ratio — 2 for a doubler, 1 for an inverter, n + 1 for an n-stage Dickson
N
flying capacitors. Each contributes one 1/(f·C) to the output resistance
N D
charge-transfer paths, which is the number of diodes in a discrete pump and the number of switch pairs in an IC
R path
switch or diode resistance plus capacitor ESR for one transfer. It sets the floor R_out cannot go below

Worked example

a discrete Schottky voltage doubler: 5 V in, 1 µF flying capacitor, 10 µF reservoir, 100 kHz, 20 mA load, 0.3 V per diode and 1.5 Ω per transfer path
Ideal, no load: n·Vin − ND·VF = 2 × 5 − 2 × 0.3 = 9.4 V
RSSL = 1 ÷ (f·C) = 1 ÷ (100,000 × 1 µF) = 10.0 Ω — the charge-sharing loss, and nothing to do with any resistance in the circuit
RFSL = 2·ND·R = 2 × 2 × 1.5 = 6.0 Ω, so Rout ≈ √(10² + 6²) = 11.662 Ω
Droop = 20 mA × 11.662 Ω = 0.2332 V, so Vout = 9.1668 V
Ripple = I ÷ (f·Cres) = 20 mA ÷ (100,000 × 10 µF) = 20 mV peak to peak
Efficiency = Vout ÷ (2 × Vin) = 91.67%. The input draws 40 mA whatever happens, because every coulomb that reaches the load passed through the input twice

The three topologies, and what each one costs

TopologyIdeal outputFlying caps NDiodes N_DR_SSLBest possible efficiency
Voltage doubler2 × Vin121 ÷ (f·C)Vout ÷ (2·Vin)
Voltage inverter−Vin121 ÷ (f·C)|Vout| ÷ Vin
Dickson, 2 stages3 × Vin232 ÷ (f·C)Vout ÷ (3·Vin)
Dickson, n stages(n + 1) × Vinnn + 1n ÷ (f·C)Vout ÷ ((n + 1)·Vin)
R_SSL is the slow-switching-limit output resistance with every flying capacitor equal to C. The efficiency column is not a loss model: it is the hard ceiling that charge conservation imposes, because the input current is n × Iout whatever the output voltage turns out to be. Every row was checked against a cycle-by-cycle simulation of the ladder.

What each knob does to the output resistance

ChangeEffect on R_SSLEffect on R_FSLEffect on ripple
Double the switching frequencyhalvesno changehalves
Double the flying capacitorhalvesno changeno change
Double the reservoir capacitorno changeno changehalves
Halve the switch resistanceno changehalvesno change
Add a Dickson stagerises by 1 ÷ (f·C)rises by 2·Rno change
Which column matters is the first question to ask. The page says which limit your design is in; if the two are within a factor of about three the answer is somewhere between, and the √(R_SSL² + R_FSL²) blend used here runs a few per cent high there — 7.4% high at the worst point measured in this page’s own simulation, which is the conservative direction.

Packets of charge, and the resistor they look like

A charge pump has no inductor. A capacitor is charged from the input in one half of the switching cycle, disconnected, reconnected somewhere else in the other half, and the charge it carries across is q = C·ΔV. Do that f times a second and the average current is f·C·ΔV. Turn that round: to deliver Iout, the voltage on the flying capacitor has to swing by Iout/(f·C), and that swing comes straight off the output. The pump therefore behaves, at its terminals, exactly like an ideal source of n·Vin in series with a resistance of 1/(f·C) per flying capacitor. That resistance is not made of any resistor in the circuit — it is the irreversible loss of charging one capacitor from another — and it is the whole design.

Two limits, and you are always in one of them. The 1/(f·C) figure is the slow-switching limit: each half period is long enough for every capacitor to settle, so the loss depends only on how much charge moved and how far it fell. Speed the clock up far enough and the capacitor voltages stop moving appreciably within a phase; the current in each conducting path is then a square wave of amplitude 2·Iout, the loss is ohmic, and the equivalent resistance flattens out at 2·ND·Rpath — the fast-switching limit. Past that point, more frequency buys nothing. Both limits are checked on this page against a simulation of the switched network itself, and the total is the usual √(RSSL² + RFSL²) blend, which is an interpolation rather than a result and errs a few per cent high in the middle.

Why efficiency is fixed before you start. Charge conservation says every coulomb delivered to the load also passed through the input n times — twice for a doubler, n + 1 times for an n-stage Dickson. So Iin = n·Iout no matter what, Pin = n·Vin·Iout, and η = Vout/(n·Vin). There is nothing a designer can do about that: a doubler running 5 V to 8 V is 80% efficient at best, and the missing 20% is dissipated inside the pump whether the switches are good or not. A charge pump is efficient only close to its own integer ratio, which is why regulated pumps change ratio (1×, 1.5×, 2×) as the input moves rather than trying to regulate by throwing voltage away. This is the single most useful thing to know about them, and it is the reason a buck or boost converter wins as soon as the ratio is not close to an integer.

Diodes, and why an IC does not have them. A discrete ladder built from diodes loses one forward drop per diode, and the drop is subtracted from the ideal output before the droop is. Three stages of silicon diodes take 2.8 V off a 5 V pump’s 20 V ideal; Schottkys take 1.2 V. An integrated pump uses MOSFET switches instead, so VF is zero and the switches appear only in Rpath. Enter 0 for the diode drop when you are modelling one.

What this does not model: stray capacitance on the flying capacitor’s plates (which costs f·Cstray·V² of switching loss and is why on-chip pumps run at a few megahertz and no faster), the clock driver’s own consumption, and the inrush when the pump starts into a discharged reservoir. For the energy stored in the capacitors themselves see the capacitor energy calculator; when the ratio is not near an integer, the boost converter designer and the buck-boost designer are the inductor-based alternatives.

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Frequently asked questions

What is the output resistance of a charge pump?

In the slow-switching limit it is N ÷ (f·Cfly), where N is the number of flying capacitors — so 1/(f·C) for a doubler or inverter. It is not a real resistor: it is the charge-sharing loss of moving q = C·ΔV per cycle, and it appears in the output voltage as Iout × Rout. Once the switch resistance dominates, the resistance flattens out at 2·ND·Rpath instead and more frequency stops helping.

Why is my charge pump’s output voltage lower than 2 × Vin?

Three things come off it in order: the diode drops (one per diode, none at all in an integrated pump), then Iout × Rout, then the ripple. On this page’s default example a 5 V doubler starts at 9.4 V after two Schottkys and lands at 9.167 V under a 20 mA load.

How efficient is a charge pump?

At most Vout ÷ (n × Vin), where n is the ideal ratio. That is a consequence of charge conservation, not of component quality: the input current is n × Iout whatever the output voltage is. A pump is therefore efficient only when it is running close to its integer ratio, and regulated parts switch ratio rather than regulate by dropping voltage.

Does a bigger flying capacitor reduce the ripple?

No — the reservoir capacitor sets the ripple, the flying capacitor sets the output resistance. They are different jobs. Doubling the flying capacitor halves the droop; doubling the reservoir halves the ripple; doubling the frequency does both.

How many stages can a Dickson multiplier have?

Arithmetically any number, practically four or five for a discrete diode ladder. Each stage adds one diode drop to the losses and one 1/(f·C) to the output resistance, so the useful output per stage falls away quickly. Past that a transformer or a boost converter gives more for less.

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References

  1. Dickson JF. On-chip high-voltage generation in MNOS integrated circuits using an improved voltage multiplier technique. IEEE Journal of Solid-State Circuits, vol. SC-11, no. 3, pp. 374–378, June 1976. The original of the n-stage diode-capacitor ladder this page calls a Dickson multiplier.
  2. Seeman MD, Sanders SR. Analysis and Optimization of Switched-Capacitor DC–DC Converters. IEEE Transactions on Power Electronics, vol. 23, no. 2, pp. 841–851, March 2008 (and the 2006 IEEE COMPEL version). The slow-switching limit RSSL = Σ ac,i²/(Cifsw), the fast-switching limit RFSL = 2 Σ Riar,i², and the √(RSSL² + RFSL²) blend used here, which that paper gives explicitly as an approximation to the transition.
  3. Analog Devices, Guide to Integrated Charge Pump DC-DC Conversion (technical article, drawing on the ICL7660/MAX660 family). Gives the switched-capacitor equivalent resistance as R = 1/(f·C₁) and the doubler, inverter and divider connections of the same four switches.
  4. Erickson RW, Maksimović D. Fundamentals of Power Electronics, 3rd ed. Springer, 2020. Ch. 2 for capacitor charge balance, which is the argument behind Iin = n·Iout and therefore behind the efficiency ceiling.
  5. IEC 60063:2015. Preferred number series for resistors and capacitors. The E6 series used for the suggested standard capacitor.