ESD and TVS Protection Calculator
ESD and TVS Protection Calculator
The peak current an electrostatic discharge delivers, the voltage the TVS actually clamps to at that current rather than at the data sheet’s test current, and then the part that catches people: the inductive drop in the loop the current takes, which for a nanosecond edge is usually far larger than the clamp itself.
What the pin sees: the clamp, and the loop
an 8 kV contact discharge through the 330 Ω network, into a TVS breaking down at 6 V and specified to clamp at 8 V at 16 A, with 10 mm of conductor in the discharge loop at 0.7 nH/mm
Three lines, and the third is the one that surprises people
Vclamp(I) = VBR + Rdynamic · Ipeak
Vpin = Vclamp + Lloop · di/dt, di/dt = k · Ipeak ÷ trise
- R dynamic
- (data sheet clamping voltage − breakdown voltage) ÷ the current the clamping voltage was stated at. A clamping voltage without its test current is not a usable number
- L loop
- the inductance in series with the clamp: the stub to the TVS, its ground via, and the return in the plane — plus the trace to the protected part if the TVS is downstream of it, which is the layout mistake
- k
- the edge-shape factor. 1 for a linear ramp, 1.02 for a Gaussian edge, ln(9) = 2.197 for a single-pole exponential edge of the same 10-to-90% rise time
- the sum
- an upper bound. The inductive drop peaks on the rising edge and the clamp voltage peaks at the current peak, so they do not add at one instant — but the inductive term is usually so much larger that it does not matter
Worked example
an 8 kV contact discharge through the 330 Ω network, into a TVS breaking down at 6 V and specified to clamp at 8 V at 16 A, with 10 mm of conductor in the discharge loop at 0.7 nH/mm
The network delivers 8 kV ÷ 330 Ω = 24.24 A. The data sheet's own two points imply a dynamic resistance of (8 − 6) ÷ 16 = 125 mΩ
So the TVS clamps to 6 + 0.1250 × 24.24 = 9.03 V at this current — 1.03 V above the 8 V on the data sheet, because that figure was taken at 16 A
Now the loop. 24.24 A in 0.8 ns is 30.3 GA/s, and 10 mm at 0.7 nH/mm is 7 nH. Their product is 212.1 V
The protected pin therefore sees about 221.2 V, of which 95.9% is the loop and only 4.1% is the diode. Choosing a TVS that clamps a volt lower changes the answer by less than half a per cent; removing a millimetre of loop changes it by 9.6%
The design number is the length at which the inductive drop equals the clamp: 0.43 mm here. A tenth of the clamp needs 0.04 mm, which is a stub of a fraction of a millimetre with a ground via in it — and that is why the rule is that the TVS goes at the connector with the protected part downstream of the junction, not in the current's path
The three ESD models are not comparable
| Model | Network | Rise time | What it represents | Standard |
|---|---|---|---|---|
| IEC 61000-4-2 contact discharge | 150 pF through 330 Ω (clause 6.1’s own notes) | sub-nanosecond | a person or tool touching the finished product at its connector or enclosure | IEC 61000-4-2; levels in Table 1 of clause 5, current waveform parameters in Table 3 of clause 6.2 |
| Human body model | 100 pF through 1,500 Ω | 2 to 10 ns | a charged person touching a bare device during handling and assembly | ANSI/ESDA/JEDEC JS-001, waveform requirements in section 5.2.3 |
| Charged device model | the device’s own capacitance, with almost no series resistance | well under a nanosecond | a charged device discharging as it is placed on a grounded surface | ANSI/ESDA/JEDEC JS-002 |
| Machine model | 200 pF with no series resistor; series inductance dominates | very fast, oscillatory | a charged machine or tool touching a device | ESD SP5.2 (now largely superseded by the charged device model) |
Where the inductance is
| Conductor | Typical inductance | In the loop? |
|---|---|---|
| Stub from the signal trace to the TVS pad | 0.3 to 1 nH per mm | yes, always |
| TVS ground pad to the nearest ground via | 0.3 to 1 nH per mm | yes, always |
| The ground via itself, through a 1.6 mm board | around 1 to 1.5 nH for a single 0.3 mm via | yes — and two vias in parallel roughly halve it |
| Return path in the plane under the stub | counted in the per-mm figure when the plane is directly beneath | yes, and much larger if there is a split or a gap |
| Trace from the TVS junction onward to the protected part | 0.3 to 1 nH per mm | only if the TVS is downstream of the part’s branch point — which is the layout to avoid |
| Connector shell to chassis bond | tens of nanohenries for a wire | yes, if the discharge return goes that way |
The diode did its job and the pin still saw two hundred volts
A TVS diode is chosen from three numbers on a data sheet — a stand-off voltage, a breakdown voltage and a clamping voltage — and the part that fails is usually not the part those three numbers describe. Two things go wrong, and the second is an order of magnitude larger than the first.
A TVS is not a voltage source. Its clamping voltage rises with current along a line whose slope is its dynamic resistance, and the data sheet quotes one point on that line. If the quoted point is at 1 A and your event delivers 24 A, the clamp is 23 A × R_dyn higher than the number you read. The two data sheet points give you the slope for free: (clamping voltage − breakdown voltage) ÷ test current. This is a real effect and it is worth tens of per cent. It is also not the main problem.
The main problem is the loop. An 8 kV contact discharge delivers tens of amperes with a rise time under a nanosecond, so di/dt is in the tens of amperes per nanosecond. Every nanohenry in series with the clamp develops L·di/dt across itself, which at 30 A/ns is 30 V per nanohenry. A stub, a pad, a ground via and a return path add up to several nanohenries without anybody noticing, and the protected pin then sees hundreds of volts while the diode is doing exactly what its data sheet promised. The clamp becomes a rounding error on its own layout. That is the single most useful thing to know about ESD protection, and this page puts a number on it: at 10 mm of loop and 0.7 nH/mm, the inductive drop is around twenty times the clamping voltage.
Which conductor is actually in the loop. The usual phrasing — the trace between the TVS and the part it protects — is loose, and getting it right changes what you do about it. What develops the voltage is the inductance carrying the discharge current in series with the clamp: the stub from the signal trace to the diode, the diode’s ground pad to its via, the via itself, and the return in the plane. The trace onward to the protected part is only in that loop if the diode sits downstream of the part’s branch point — which is precisely the layout the at-the-connector rule exists to prevent. Place the TVS where the discharge arrives, give it its own ground via right beside its pad, and the protected part is then outside the current path rather than inside it.
And a caveat on di/dt. I_peak ÷ t_rise is the slope of a straight ramp. For the same 10-to-90% rise time, a single-pole exponential edge has a peak slope ln(9) = 2.197 times larger and a Gaussian edge 1.02 times larger. So the linear estimate is the optimistic end of the range, by up to a factor of two — which this page makes an input rather than hiding. Against that, the clamp voltage and the inductive drop do not peak at the same instant, so adding them is an upper bound. Both effects are worth stating and neither changes the conclusion.
Two smaller things that still fail designs. The stand-off voltage has to sit above the signal’s maximum including every tolerance, or the diode conducts in normal operation: on a digital line that is a level error, and on a high-impedance analogue line it is an offset that nobody attributes to the protection diode for weeks. Leakage also rises steeply with temperature, so the margin needed at 85 °C is larger than at 25 °C. And the diode’s capacitance is a shunt load on the line — a few tenths of a picofarad is nothing on a CAN bus and is most of the budget on a USB 3 pair, which is why sub-picofarad ESD diodes exist and why they clamp higher. For the trace’s own inductance per unit length, the microstrip impedance calculator reports it directly; for the loop a bond or strap adds, the bonding strap impedance calculator is the same arithmetic at lower frequencies.
Frequently asked questions
My TVS clamps at 8 V but the pin sees 200 V. Is the diode faulty?
Almost certainly not. The 8 V is the clamping voltage at the data sheet’s test current, and the 200 V is mostly L·di/dt in the loop the discharge current takes. At 30 A per nanosecond, one nanohenry is 30 V, and a stub plus a pad plus a ground via is easily several nanohenries. The diode did its job; the layout put a few hundred volts in series with it.
How close does the TVS have to be?
Close enough that the inductive drop is a small fraction of the clamp, which this page computes for you. At the default settings the inductive drop equals the clamping voltage at under half a millimetre of loop, and a tenth of it needs under a twentieth of a millimetre — which is to say it cannot be achieved by proximity alone. What you can do is minimise the loop: TVS at the connector, its own ground via immediately beside its pad, no stub, and the protected part downstream of the junction rather than in the current’s path.
Why can I not use the clamping voltage from the data sheet directly?
Because it is a single point on a sloped line and your event is almost certainly at a different current. The clamp is V_BR + R_dyn·I, and the two numbers on the data sheet give you R_dyn for free. A clamping voltage quoted without its test current is not a usable specification.
Does a series resistor help?
A great deal, and it is the cheapest ESD measure there is. It drops part of the voltage across itself, reduces the peak current and therefore the clamp voltage, and reduces di/dt. The reason it is not always used is bandwidth: a series resistor on a 5 Gb/s pair is not an option. On a low-speed digital line, an analogue input or a control pin it usually is, and the resistor wants to be on the protected side of the TVS so it is in series with what is left.
Is a 2 kV human body model rating enough for an 8 kV contact discharge test?
No, and the two figures are not comparable. The human body model is a component-level qualification on a bare device in a handler, through 1,500 Ω; an IEC 61000-4-2 contact discharge is a system-level test at the finished product’s connector or enclosure, through 330 Ω, with a far faster edge. The system test delivers roughly twenty times the peak current for the same voltage. A part’s HBM rating tells you it can be assembled, not that your product will pass.
Does the TVS capacitance really matter?
On anything above a few hundred megabits, yes. A shunt capacitance part-way along a matched line sees the source and load in parallel, so it adds about 2.2 × (Z₀/2) × C to the rise time and reflects a proportion of the edge. Half a picofarad on a 50 Ω line is about 28 ps, which is nothing on a CAN bus and a real fraction of the budget on a multi-gigabit pair.
Related calculators
References
- IEC 61000-4-2 Edition 2.0, Electromagnetic compatibility (EMC) — Part 4-2: Testing and measurement techniques — Electrostatic discharge immunity test. Clause 5 and its Table 1 give the test levels; clause 6 specifies the test generator, with clause 6.1’s notes giving the energy storage capacitor and discharge resistor as typically 150 pF and 330 Ω, and clause 6.2 with Table 3 giving the contact discharge current waveform parameters; clause 7 is the test setup. Clause and table numbers verified against the published document. The waveform parameter values are copyrighted and are not reproduced here — the page takes them as inputs.
- ANSI/ESDA/JEDEC JS-001, Electrostatic Discharge Sensitivity Testing — Human Body Model (HBM) Component Level, with the companion user guide ESDA/JEDEC JTR001-01-12 (2012), which points to the waveform requirements in section 5.2.3 of the standard. The 100 pF / 1,500 Ω network and the 2 to 10 ns rise time are the published characteristics; the widely quoted 0.67 A per kilovolt is 1 ÷ 1,500 Ω. Copyrighted; cited, not reproduced.
- ANSI/ESDA/JEDEC JS-002, Electrostatic Discharge Sensitivity Testing — Charged Device Model (CDM) Device Level. The charged device model discharges the device’s own capacitance with almost no series resistance, giving tens of amperes in well under a nanosecond. Copyrighted; cited, not reproduced.
- ESD Association, ESD Fundamentals Part 5: Device Sensitivity and Testing. The publicly available summary of the three models and their networks used here: HBM 100 pF through 1.5 kΩ with a 2 to 10 ns rise time, 0.67 A/kV peak and a 200 ns pulse width; CDM under a nanosecond and several tens of amperes; MM 200 pF with no series resistor and series inductance dominant.
- Johnson HW, Graham M. High-Speed Digital Design: A Handbook of Black Magic. Prentice Hall, 1993. For the relationship between an edge’s rise time and its peak slope, and for the shunt-capacitance discontinuity on a transmission line. The edge-shape factors used here are derived and checked numerically in this page’s own build script rather than taken from a table: 1 for a linear ramp, 1.0225 for a Gaussian edge, ln(9) = 2.1972 for a single-pole exponential edge of the same 10-to-90% rise time.