Differential Pair Impedance Calculator
Differential Pair Impedance Calculator
Differential, odd-mode, even-mode and single-ended impedance of an edge-coupled pair — microstrip or stripline — from trace width, gap, dielectric height, copper weight and εᵣ, with the coupling coefficient and an honest account of how approximate the published fits are.
differential pair impedance
a pair of 0.2 mm traces 0.15 mm apart on 0.2 mm of FR-4 prepreg, εᵣ 4.3, 1 oz copper
The pair, and the fits that describe it
microstrip: Zdiff = 2Z₀ [1 − 0.48 e−0.96 s/h]
stripline: Zdiff = 2Z₀ [1 − 0.347 e−2.9 s/b]
k = (Zeven − Zodd) / (Zeven + Zodd)
- w, s
- trace width and the edge-to-edge gap between the two traces
- h, b
- dielectric height to the plane (microstrip), or the plane-to-plane thickness (stripline)
- Z odd
- the impedance one trace presents when the pair is driven differentially — the other trace is at the opposite voltage, so the field between them adds capacitance and the impedance falls
- Z even
- the impedance one trace presents when both are driven the same way. Nothing flows between them, so the impedance rises
- k
- the coupling coefficient. Half of it is the backward crosstalk coefficient — the fraction of a passing edge that appears at the near end of the victim trace
Worked example
a pair of 0.2 mm traces 0.15 mm apart on 0.2 mm of FR-4 prepreg, εᵣ 4.3, 1 oz copper
One trace on its own: w/h = 1.0, and Hammerstad's microstrip equations give Z₀ = 64.91 Ω with εeff = 3.1382
s/h = 0.15 ÷ 0.2 = 0.75, so IPC-2141's coupling factor is 1 − 0.48 e−0.96 × 0.75 = 0.76636
Zdiff = 2 × 64.91 × 0.76636 = 99.49 Ω — inside the ±10% that Ethernet, PCIe and USB 3 all allow around 100 Ω
Zodd = 49.74 Ω and Zeven = Z₀²/Zodd = 84.70 Ω, so k = 0.2600 and about 13.0% of a passing edge shows up at the near end of the other trace
The coupling has pulled Zdiff 23.4% below the uncoupled 129.82 Ω. Open the gap to 0.3 mm and it recovers to 115.06 Ω
Delay is √εeff/c = 5.9090 ps/mm, so 1 ps of skew is 0.169 mm of length mismatch
Geometries for the impedances the standards ask for
| Case | h or b | Trace width | Gap | s ÷ h | Single-ended Z₀ | Z_diff reached | Notes |
|---|---|---|---|---|---|---|---|
| 100 Ω USB 3, Ethernet, PCIe, LVDS — outer layer | 0.200 mm | 0.1975 mm | 0.150 mm | 0.750 | 65.24 Ω | 100.00 Ω | The page default. A 0.2 mm trace on a 0.2 mm prepreg with a 0.15 mm gap. |
| 100 Ω, same stack-up, gap opened to 0.4 mm | 0.200 mm | 0.3015 mm | 0.400 mm | 2.000 | 53.78 Ω | 100.00 Ω | Double the gap and the trace has to get NARROWER, because the coupling that was lowering Zdiff has gone. |
| 90 Ω USB 2.0 — outer layer | 0.200 mm | 0.2514 mm | 0.150 mm | 0.750 | 58.72 Ω | 90.00 Ω | USB 2.0 specifies 90 Ω ±15%. Lower impedance means a wider trace on the same stack. |
| 100 Ω on an inner layer, centred stripline | 0.700 mm | 0.1723 mm | 0.200 mm | 0.286 | 58.93 Ω | 100.00 Ω | A buried pair on a 0.7 mm plane-to-plane stack. Narrower than the microstrip, as always. |
| 90 Ω on an inner layer, centred stripline | 0.700 mm | 0.2250 mm | 0.200 mm | 0.286 | 53.04 Ω | 90.00 Ω | The same stack for USB 2.0. |
| 100 Ω microstrip on a thin 0.1 mm prepreg | 0.100 mm | 0.0995 mm | 0.100 mm | 1.000 | 61.26 Ω | 100.00 Ω | Halve the dielectric and everything halves with it; this is the HDI case. |
Two traces, four impedances, and one honest caveat
A differential pair is two traces carrying equal and opposite signals. Because they are close together, each one changes the other’s impedance, and which impedance you mean matters. Odd mode is what one trace sees when the pair is driven differentially: the neighbour is at the opposite voltage, the field between them adds capacitance, and the impedance falls below the single-ended value. Even mode is what one trace sees when both are driven the same way — nothing flows across the gap, so the impedance rises. The differential impedance the standards quote is twice the odd-mode impedance, and the common-mode impedance is half the even-mode one. A 100 Ω pair is therefore two 50 Ω-ish traces, each a little below 50 Ω because of the coupling.
Why the gap matters less than people expect. The coupling falls away exponentially with the gap measured in dielectric heights, and it is very nearly gone by s = 2h. At s/h = 1 the coupling has pulled the differential impedance 18% below twice the single-ended value; at s/h = 2 that is 7%; at s/h = 3 it is 2.7%, and at s/h = 4 it is 1%. So the whole of the gap’s influence, from touching to infinitely far apart, is worth under 50%, and almost all of that is used up in the first two dielectric heights. The practical lesson is that beyond about two dielectric heights the pair has stopped being a pair as far as impedance is concerned — each trace is just a single-ended line — and the routing effort is better spent on length matching and on keeping the return path under both traces unbroken. What a wide gap does buy you is immunity to a manufacturing error in the gap itself, because the curve is flat there.
How approximate these numbers are — plainly. IPC-2141’s two exponentials are curve fits in one variable. They know the gap, the dielectric height and nothing else: the same factor is applied whether the traces are a tenth of a dielectric height wide or three times it, which cannot be right, and it is not. Both fits were checked here against a two-dimensional finite-volume solution of Laplace’s equation on the real cross-section, written from scratch, with odd and even modes taken from a symmetry wall and an electric wall on the plane between the traces, and with the isolated single trace solved on the same grid so that the ratio carries almost none of the solver’s own error. For a w/h = 1 microstrip pair the fit under-read the differential impedance by 7.1% at a gap of half a dielectric height, 6.0% at one height and 2.4% at two: it over-states the coupling, and it over-states it more as the traces get wider, because the width is not in the formula at all. The stripline fit went the other way, over-reading by 16.7% at s/b = 0.15 and 3.6% at s/b = 0.4 before settling to within 0.1% by s/b = 1, because the exponential cannot keep up with how fast real coupling rises once the traces are close. Treat this page as the tool that tells you which way to move a dimension, and the board house’s field solver as the tool that tells you what to draw. They will also adjust the etched width to hit the target and send you a coupon measurement to prove it.
What is left out. Solder mask, which lowers a microstrip pair by a couple of ohms. The trapezoidal etch profile. Glass-weave skew, which is a real and much-underrated cause of differential-to-common conversion above a few gigahertz. Loss. And the fact that on a microstrip the even and odd modes genuinely travel at different speeds, because they put different fractions of their field in the air — this page uses one effective permittivity for both, as nearly every closed form does. A buried pair does not have that problem, which is one more reason to put the fast stuff on an inner layer: see the stripline impedance calculator for that geometry on its own, the microstrip impedance calculator for a single outer-layer trace, and the PCB trace width calculator for the entirely separate question of how much current a trace can carry.
Frequently asked questions
What is differential impedance?
Twice the odd-mode impedance of one trace — the impedance the pair presents to a driver sending equal and opposite signals down it. It is not the same as two single-ended impedances added up, because each trace’s impedance is pulled down by its neighbour. A 100 Ω pair is two traces each sitting a little under 50 Ω.
How do I get 100 Ω differential?
On a 0.2 mm FR-4 prepreg with 1 oz copper, two 0.2 mm traces with a 0.154 mm gap come to almost exactly 100 Ω. Halve the prepreg to 0.1 mm and the width and gap halve with it. The width is what does the work; the gap is a trim.
Does the gap between the traces matter?
Less than most people think, once it is more than about twice the dielectric height. Closing the gap from 2h to 1h lowers the differential impedance by about 11%; opening it from 2h to 4h raises it by only 6%. Below about half a dielectric height it starts to matter a lot, and that is also where the etching tolerance hurts most.
What is the coupling coefficient used for?
Half of it is the backward crosstalk coefficient: the fraction of a switching edge on one trace that appears at the near end of the other. For the default pair here k is about 0.26, so roughly 13% of an aggressor’s swing arrives as near-end crosstalk on a victim routed that close — which is exactly why a differential pair should be routed tight to itself and well away from everything else.
Why does my board house quote a different width?
Because they solve the real stack-up numerically, with the actual prepreg permittivity, the solder mask, the etch profile and the copper roughness, and because the fits used here are accurate to a few per cent at best. Their number is the one to build to.
Is 90 Ω or 100 Ω right for USB?
USB 2.0 specifies 90 Ω differential; USB 3.x SuperSpeed pairs, Ethernet, PCIe and LVDS are all 100 Ω. HDMI is 100 Ω too. Check the specification you are actually building to — mixing them up costs a few per cent of eye height, which may or may not be the thing that breaks the link.
Related calculators
References
- IPC. IPC-2141A, Design guide for high-speed controlled impedance circuit boards. The edge-coupled differential fits used here: Z_diff = 2Z₀(1 − 0.48 e^(−0.96 s/h)) for microstrip and Z_diff = 2Z₀(1 − 0.347 e^(−2.9 s/b)) for symmetric stripline. The standard is a paid document and was not read for this page: both expressions were taken from independent published transcriptions that agree with each other, and their accuracy was then measured here against a field solve rather than assumed.
- Hammerstad EO. Equations for microstrip circuit design. Proceedings of the 5th European Microwave Conference, Hamburg, 1975, pp. 268–272, with the Hammerstad and Jensen strip-thickness correction. The single-ended microstrip model here is the same one the microstrip page on this site uses, transcribed from that record so the two cannot drift apart.
- Steer M. Microwave and RF Design II — Transmission Lines, 3rd ed., §3.7 Stripline. Wheeler’s finite-thickness closed form, used here for the single-ended impedance of a buried trace.
- USB Implementers Forum. Universal Serial Bus Specification, Revision 2.0 — the 90 Ω ±15% differential characteristic impedance for USB 2.0 high-speed signalling, against 100 Ω differential for USB 3.x SuperSpeed, PCI Express and Ethernet. The specification is distributed by USB-IF and was not fetched for this page; the figures are as quoted consistently in the silicon vendors’ own USB layout guides, and nothing on this page is computed from them.
- Johnson H, Graham M. High-Speed Digital Design: A Handbook of Black Magic. Prentice Hall, 1993. Chapter 5 on transmission lines and chapter 6 on crosstalk — where the backward crosstalk coefficient of k/2 comes from, and why the coupling falls off as fast as it does.