Stripline Impedance Calculator
Stripline Impedance Calculator
Characteristic impedance, propagation delay and guided wavelength for a buried PCB trace between two reference planes — symmetric or offset — from its width, the plane-to-plane dielectric thickness, copper weight and εᵣ, or the width you need for a target impedance, by bounded bisection.
stripline impedance
a 0.25 mm trace centred in a 0.7 mm plane-to-plane stack, εᵣ 4.3, 1 oz copper, 50 mm long, at 1 GHz
Wheeler’s stripline equations
weff/b = w/b for w/b ≥ 0.35, otherwise w/b − (0.35 − w/b)² ÷ (1 + 12t/b)
Cf = (2/π) ln[1/(1 − t/b) + 1] − (t/πb) ln[1/(1 − t/b)² − 1]
exactly: Z₀ = (30π/√εr) · K(k)/K(k′), k = sech(πw/2b), k′ = tanh(πw/2b)
εeff = εr tpd = √εr / c λg = c / (f√εr)
- w, b
- trace width, and the plane-to-plane dielectric thickness — NOT the height to one plane, which is what a microstrip uses
- t
- copper thickness, 35 µm for 1 oz. In a stripline it matters more than in a microstrip, because the trace is narrower to begin with
- eps r
- the laminate’s relative permittivity, about 4.3 for FR-4
- C f
- Wheeler’s fringing term. As t goes to zero it becomes (2/π)ln 2 = 0.4413, the 0.441 in every textbook’s zero-thickness stripline formula
- K
- the complete elliptic integral of the first kind. K(k)/K(k′) is AGM(1, k)/AGM(1, k′), so this page computes the exact answer with eight steps of an arithmetic-geometric mean
Worked example
a 0.25 mm trace centred in a 0.7 mm plane-to-plane stack, εᵣ 4.3, 1 oz copper, 50 mm long, at 1 GHz
w/b = 0.25 ÷ 0.7 = 0.357143, just above 0.35, so weff = w and no narrow-strip correction applies
t/b = 0.050000, giving Wheeler's fringing term Cf = 0.49322 — a little above the zero-thickness 0.4413
Z₀ = (30π ÷ √4.3) × 0.95000 ÷ (0.35714 + 0.49322) = 50.78 Ω
With zero-thickness copper the exact conformal-mapping answer is 57.56 Ω, so 35 µm of copper is worth 6.79 Ω here — the copper is 5% of the plane spacing
εeff is 4.3 exactly, so the delay is √εᵣ/c = 6.9169 ps/mm (175.7 ps/inch) and the 50 mm trace delays the signal by 345.8 ps
At 1 GHz the guided wavelength is 144.57 mm and the trace is 124.5° long
IPC-2141's stripline equation gives 50.16 Ω on the same geometry
Widths for the impedances people actually ask for
| Case | Plane spacing b | εᵣ | Trace width | In mils | Impedance reached | Notes |
|---|---|---|---|---|---|---|
| 50 Ω on a 0.7 mm inner layer, 1 oz copper | 0.700 mm | 4.3 | 0.2593 mm | 10.21 mil | 50.00 Ω | The page default. A 50 Ω stripline is roughly half the width of the 50 Ω microstrip over the same total dielectric, because both planes pull on the field. |
| 50 Ω on a 0.5 mm inner layer | 0.500 mm | 4.3 | 0.1697 mm | 6.68 mil | 50.00 Ω | Thinner stack, narrower trace: as in microstrip it is the ratio w/b that sets the impedance, not either dimension alone. |
| 50 Ω on a 0.254 mm (10 mil) core | 0.254 mm | 4.2 | 0.0891 mm | 3.51 mil | 50.00 Ω | Half-ounce copper on a thin core. Below about 0.1 mm the fab starts charging extra, so this is close to the practical floor. |
| 75 Ω on a 0.7 mm inner layer | 0.700 mm | 4.3 | 0.0816 mm | 3.21 mil | 75.00 Ω | Video impedance. Stripline runs out of width sooner than microstrip does — 75 Ω needs a trace under 0.1 mm here. |
| 40 Ω on a 0.7 mm inner layer | 0.700 mm | 4.3 | 0.4103 mm | 16.15 mil | 40.00 Ω | Lower impedances are easy: the trace simply gets wider. |
| 50 Ω on the same 0.7 mm stack with 2 oz copper | 0.700 mm | 4.3 | 0.2083 mm | 8.20 mil | 50.00 Ω | Doubling the copper thickness lowers the impedance, so the trace has to get NARROWER to come back to 50 Ω — the opposite of most people’s intuition. |
The buried trace, and why it is slower
A stripline is a trace buried inside the board with a reference plane above it and another below. It is the geometry the microstrip impedance calculator explicitly says it cannot model, and the difference is not a detail: a second plane roughly doubles the capacitance per unit length for the same width, so a stripline comes out at about half the impedance of a microstrip of the same width over the same total dielectric. Put the other way round, a 50 Ω stripline is far narrower than a 50 Ω microstrip on the same board.
Effective permittivity, and why stripline is slow. A microstrip has air above it, so part of its field runs through air and the wave sees an average — an effective permittivity between 1 and εᵣ. A stripline has laminate on every side. Every field line stays in the dielectric, so the effective permittivity is εᵣ itself, with no averaging and, because the mode is purely TEM, no dispersion either. That is worth stating plainly because it is the practical consequence: on FR-4 a microstrip runs at about 6.02 ps/mm and a stripline at 6.92 ps/mm, 15% slower, and the guided wavelength is shorter by the same factor. If you move a length-matched bus from an outer layer to an inner one, its delay changes and the matching has to be redone.
How good the numbers are. The closed form here is Wheeler’s, in the form Steer prints it, and its published accuracy is about 1% for w/(b − t) above 0.05 with thin copper. That was checked rather than repeated. Two independent computations were run against it: Cohn’s exact conformal-mapping solution for a zero-thickness strip, which reduces to a ratio of complete elliptic integrals and which this page also computes live by an arithmetic-geometric mean; and a two-dimensional finite-volume solution of Laplace’s equation on the actual cross-section, written from scratch, with the capacitance taken from the field energy. Against the field solve the closed form was within 0.48% everywhere from w/b = 0.2 to w/b = 2 and from t/b = 0.005 to t/b = 0.05 — better than its own claim, and well outside the thickness range that claim is stated for. Against the exact zero-thickness answer it is inside 1.28% everywhere from w/b = 0.1 to w/b = 5 — the worst of it at w/b = 0.35 (1.17%) and w/b = 0.1 (1.28%), where the narrow-strip correction is doing most of the work — and inside 0.37% once w/b is above 0.5. The IPC-2141 stripline equation is shown alongside because many fabrication guides quote it, but it is a narrow-strip fit and is only valid below w/(b − t) = 0.35.
Offset stripline, and what it costs. A signal layer is rarely exactly halfway between its planes — a six-layer stack usually has a thin prepreg on one side and a thicker core on the other. Choose the offset mode and the page treats the line as two symmetric striplines in parallel, one of plate spacing 2h₁ + t and one of 2h₂ + t. Against the field solve that rule is within 0.2% at h₁ = 0.4b, 1.5% at 0.3b, 3.6% at 0.2b and 5.6% at 0.12b, so it is trustworthy while the trace stays in the middle two-thirds of the stack and should not be relied on beyond that. Moving a trace off centre LOWERS its impedance relative to a centred one of the same width, because the nearer plane gains more capacitance than the further one gives up: the 0.25 mm trace here reads 50.78 Ω centred and 46.72 Ω with only 0.2 mm of dielectric under it. A 100 Ω single-ended stripline is close to unbuildable on FR-4 for the same reason a narrow one is hard to etch — at εᵣ 4.3 even a 0.08 b trace on a 1.6 mm stack only reaches about 90 Ω.
What this model does not include. Conductor and dielectric loss are ignored entirely. Etching gives a trapezoidal cross-section, not a rectangle. The εᵣ of the prepreg and the core in a real stack-up are not the same number, and this page has room for only one. Plane splits, via stubs and the return-path discontinuity where a signal changes layer are all outside it. A pair of coupled traces is a different problem again — see the differential pair impedance calculator. For how much current a trace can carry rather than what impedance it presents, the PCB trace width calculator, and for what a mismatch on the finished line costs, the VSWR and return loss converter.
Frequently asked questions
What is the difference between microstrip and stripline?
A microstrip is on the outside of the board with one plane under it and air above; a stripline is buried between two planes. The stripline has no air in its field, so its effective permittivity is εᵣ rather than an average, it is about 15% slower on FR-4, and it needs roughly half the width for the same impedance over the same total dielectric. It also radiates far less, which is why noisy or sensitive high-speed nets get buried.
Why is stripline slower than microstrip?
Because all of its field is in the laminate. Propagation delay is √εᵣ/c for a stripline and √ε_eff/c for a microstrip, and ε_eff is always less than εᵣ because some of a microstrip’s field runs through the air above the trace. On FR-4 that is 6.92 ps/mm against 6.02 ps/mm — 176 ps/inch against 153.
How wide is a 50 Ω stripline?
It depends entirely on the plane-to-plane spacing. Centred in a 0.7 mm stack on FR-4 with 1 oz copper it is about 0.259 mm; in a 0.5 mm stack about 0.170 mm; on a 0.254 mm core about 0.089 mm, which is below what many board houses will quote as standard. The width alone means nothing without the spacing.
Does copper thickness matter for a stripline?
More than it does for a microstrip, because a stripline trace is narrower for the same impedance, so the copper is a larger fraction of it. On the 0.7 mm example here, 35 µm of copper is worth about 6.8 Ω — it takes the line from 57.6 Ω with an ideal zero-thickness strip down to 50.8 Ω. Ignore it and you will be a long way out.
Can I use this for an asymmetric or offset stripline?
Yes — switch the second selector to the offset case and give the dielectric thickness from the trace to the nearer plane. The page models it as two symmetric striplines in parallel, which was checked here against a field solve and holds to about 1.5% while the trace stays in the middle two-thirds of the stack. Closer to a plane than that and the rule starts to over-read.
Why does my board house give a different number?
Because they run a two-dimensional field solver on your actual stack-up, with the real prepreg and core permittivities, the trapezoidal etch profile and the copper roughness. Their number is the one to build to. Use this page to get the design close and to see which way each variable moves the answer.
Related calculators
References
- Steer M. Microwave and RF Design II — Transmission Lines, 3rd ed., §3.7 Stripline (open access, NC State University / LibreTexts). The finite-thickness closed form used here: Z₀ = [30π/√εᵣ](1 − t/b)/(w_eff/b + C_f), with w_eff/b = w/b − (0.35 − w/b)²/(1 + 12t/b) for w/b < 0.35 and C_f = (2/π)ln[1/(1 − t/b) + 1] − (t/πb)ln[1/(1 − t/b)² − 1]; the zero-thickness form 94.25/√εᵣ ÷ (w_eff/b + 0.441); and the accuracy statement “better than 1% for W/(b − t) > 0.05 and t/b < 0.025”.
- Cohn SB. Characteristic Impedance of the Shielded-Strip Transmission Line. IRE Transactions on Microwave Theory and Techniques, vol. 2 no. 2, July 1954, pp. 52–57. The exact conformal-mapping solution Z₀ = (30π/√εᵣ)·K(k)/K(k′) with k = sech(πw/2b), computed live on this page by an arithmetic-geometric mean and checked here against scipy’s elliptic integrals to one part in 10¹³. The 1954 paper itself is behind IEEE’s paywall and was not read for this page: the equation was taken from two independent published transcriptions and then verified numerically, against the AGM identity, against the parallel-plate limit and against this page’s own field solve.
- IPC. IPC-2141A, Design guide for high-speed controlled impedance circuit boards. Its symmetric stripline equation, Z₀ = (60/√εᵣ)·ln[4b/(0.67π(0.8w + t))], stated for w/(b − t) < 0.35 and t/b < 0.25, is shown here only as a cross-check. The standard is a paid document and was not read for this page; the equation and its range were taken from two independent published transcriptions that agree with each other, and it is then compared on screen against a model that was verified numerically.
- Pozar DM. Microwave Engineering, 4th ed. Wiley, 2012. §3.7 on stripline — the TEM mode, the absence of dispersion, and why the effective permittivity of a stripline is the laminate’s εᵣ with no air term.