Isolated Transformer Design Calculator

Isolated Transformer Design Calculator

Isolated Transformer Design Calculator (Forward / HB / FB / Push‑Pull)

Topology: Forward (single‑ended)

Design Targets

≤0.5 typical (reset or symmetric)
Used for turns at VIN,design
Often low‑line

Core & Window

ΔB = γ·BMAX
0.25–0.4 typical
≥1 to inflate DC copper loss

Outputs / Secondaries

Each row: Label, Vout (Vdc), Iout (A), Rectification, Diode drop (V)
Turns are computed at VIN,design & D(design): Ns = Np · (Vout + Vdrop) / (Vp,design · D). For synchronous rectification, set drop ≈ 0.05–0.1 V.

Key Transformer Results

Loss & Window Checks

Assumptions & Equations
  • Applied primary volts: Forward/TTF/Full‑bridge/Push‑pull → Vp = Vin; Half‑bridge → Vp = Vin/2.
  • Volt‑seconds limit: Np,min ≥ Vp,max·Dmax / (ΔB·Ae·f). ΔB = γ·BMAX.
  • Secondary turns at design: Ns = Np·(Vout + Vdrop) / (Vp,design·D).
  • Primary on‑current ≈ Σ(Iout·Ns/Np). Primary RMS ≈ Ion·√D.
  • Secondary RMS (per winding) ≈ Iout·√D.
  • Wire area suggestion: A ≈ Irms/J. DC copper loss uses R = ρ·(N·MLT)/A; Pcu = I2·R. (ρ=1.724e−8 Ω·m)
  • AC factor φAC scales copper loss crudely. For Litz, choose strand dia ≤ 2·δ, δ = √(ρ/(π μ₀ μᵣ f)).
  • Core loss (optional): Pcore = k·f^α·(ΔB)^β·Ve (use SI‑consistent k).

How to Use the Isolated Transformer Design Calculator

A practical guide covering Forward (single / two‑transistor), Half‑Bridge, Full‑Bridge, and Push‑Pull. The steps mirror your calculator’s inputs and outputs.

0) Pick the Topology

  • Forward (single): simple; duty typically ≤ 0.5 with reset.
  • Forward (two‑transistor): lower switch stress; duty ≈ ≤ 0.5.
  • Half‑Bridge: primary sees Vp = Vin / 2.
  • Full‑Bridge / Push‑Pull: primary sees Vp = Vin; duty ≈ ≤ 0.5.
The calculator handles the proper primary voltage automatically when you change topology.

1) Global Inputs

  • VIN,min, VIN,max
  • fSW (kHz)
  • Dmax (topology‑limited) and D (design)
  • VIN,design (often low‑line) and η (efficiency guess)

2) Core & Material

  • Ae, Aw, Ve (mm² / mm³)
  • BMAX and flux utilization γ (so ΔB = γ·BMAX)
  • Optional Steinmetz: k, α, β
  • Winding geometry: MLT, window utilization Ku, current density J, and AC multiplier φAC

3) Add Outputs

  • Add rows for each secondary: Label, Vout, Iout, Rectification, Drop.
  • Turns at design point: Ns = Np · (Vout + Vdrop) / (Vp,design · D).
  • For synchronous rectification, use a small drop (≈ 0.05–0.1 V).

4) Primary Turns

  • Volt‑seconds: Np,min ≥ Vp,max·Dmax / (ΔB · Ae · f).
  • Half‑bridge uses Vp = Vin/2; others use Vp = Vin.
  • Round Np to an integer, then compute secondaries and re‑check ΔB.
The calculator reports ΔB used after rounding; keep it ≤ BMAX.

5) RMS & Wire Area

  • Ipri,rms (est) from reflected loads: roughly Ion·√D.
  • Secondary RMS per winding ≈ Iout·√D.
  • Suggested copper area: A ≈ Irms/J. Apply φAC ≥ 1 for AC effects.

6) Window & Core Loss

  • Window fill: compare ΣAcu vs Ku·Aw.
  • Optional core loss: Pcore = k·fα·ΔBβ·Ve (units must be consistent).
  • Skin depth: δ ≈ √(ρ/(πμ₀f)); choose Litz strands ≤ 2·δ.

7) Read the Results

  • Key Transformer Results: Np, ΔB used, Pout, Ipri,rms, primary copper area.
  • Loss & Window Checks: ΣAcu, fill factor, Pcu (pri/sec), Pcore, skin depth.
  • Windings table: per‑secondary turns, ratio, Irms, wire area, length, R, Pcu.

Quick Checklist

  • Topology set and Dmax realistic
  • Np rounded and ΔB used ≤ BMAX
  • Each Ns computed at Vin,design & D(design)
  • Ipri,rms and Isec,rms checked
  • ΣAcu ≤ Ku·Aw (window)
  • Pcore reasonable for temp rise
  • Skin depth → strand choice OK
  • Thermal headroom ≥ 20–30%
FAQ & Tips

Why do half‑bridge turns look larger?
Because the primary sees Vin/2, the volt‑seconds are smaller, so Np increases for a given ΔB.

ΔB exceeds BMAX after rounding.
Increase Np, lower Dmax, reduce Vin,max, or pick a larger Ae.

Window overfill (>100%).
Lower J, use Litz/foil, split layers, or choose a core with bigger Aw or higher Ku.

How accurate is Pcore?
It’s a first‑order Steinmetz estimate; check your core vendor’s curves and temperature dependence.

What drop should I use for synchronous rectification?
Use 0.05–0.1 V as a starting point; refine with conduction loss of the FET and inductor ripple.

Copy‑Paste Mini Workflow

1) Choose topology → set VIN_min/max, fSW, Dmax, D(design), VIN_design, η
2) Enter core/window: Ae, Aw, Ve, BMAX and γ; MLT, Ku, J, φAC; (optional) k, α, β
3) Add secondaries with Vout, Iout, rectification and drop
4) Compute Np from volt‑seconds; round Np; recompute Ns and check ΔB used
5) Read I_pri,rms and I_sec,rms; size copper area A ≈ Irms/J
6) Check window fill, P_cu, P_core, and skin depth; iterate
7) Export results → build and validate on bench