Buck Converter Designer — Inductor, Capacitor, MOSFET & Diode Sizing | CalcEngines
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Buck Converter Designer

Complete step-down DC-DC converter design tool. Calculate duty cycle, inductor, output capacitor, MOSFET and diode ratings, switching losses, and efficiency. CCM and DCM analysis included.

Buck Converter Designer
Step-down DC-DC · CCM/DCM · Full loss analysis · Interactive schematic
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Input / Output Specification
V
V
A
Switching Parameters
kHz
%
%
%
MOSFET / Diode / Cap
V
nC
V
Key Results
Duty Cycle D
%
Ideal D (no loss)
Practical D (with η)
Voltage Gain M
Input Current Iin
◆ CCM — Continuous Conduction Mode
Min Inductance
μH (CCM boundary)
Recommended L
μH (with margin)
Output Cap Cout
μF minimum
IL Average
A
IL Peak
A
ΔIL Ripple
A peak-to-peak
Estimated Efficiency
%
Enter parameters
60%75%85%92%98%
Buck Converter — KiCad Schematic (Trial1.sch)
+VDC — V Q1 N-MOS GATE PWM — kHz D=—% SW D1 DIODE Vf=— V L — μH VOUT — V C — μF LOAD — A GND GND GND
Inductor Specification
Min L (CCM)
μH
Recommended L
μH (×1.5 margin)
IL Peak
A (saturate ≥ this)
IL RMS
A
ΔIL p-p
A
Energy ½LI²
μJ
Select an inductor with saturation current ≥ IL,peak and DCR as low as possible.
Output Capacitor
Cout for ΔV
μF
ESR Ripple
V
Total Ripple
V p-p
Cap RMS Current
A
Target ΔVout
V
Voltage Rating
V (≥1.5× Vout)
MOSFET Requirements
VDS Blocking
V (= Vout)
ID Peak
A
ID RMS
A
RDS(on)
Cond. Loss
W
Rec. VDS Rating
V (1.3×Vout)
Diode Requirements
VR Reverse
V
IF,avg
A
IF,peak
A
Diode Loss
W
Component Summary Table
ComponentParameterMinimumRecommendedStatus
Loss Breakdown
Total Estimated Loss
W
Pin
Pout
Calculated η
Output/Loss ratio
MOSFET Conduction (I²·RDS)
MOSFET Switching (Qg·V·f)
Diode Conduction (Vf·Iout)
Inductor DCR (estimated)
Output Cap ESR
Calculated Efficiency
%
Calculate to see result
60%75%85%92%98%
Detailed Loss Table
Loss SourceFormulaValue (W)% of TotalReduction Tip
Key Waveforms — One Switching Cycle
Inductor Current iL(t)
iL t I_avg I_peak I_valley ← D·T → ← (1-D)·T →
MOSFET Gate Signal Vgs(t)
Vgs
Diode Current iD(t)
iD
Period T
μs
ON time D·T
μs
OFF time (1-D)·T
μs
Duty Cycle
D_ideal = Vout / Vin D_prac = Vout / (Vin × η) t_on = D / fsw t_off = (1−D) / fsw
Ideal D assumes 100% efficiency. Practical D is slightly higher to account for losses. D must stay below ~0.95 for controller startup headroom.
Voltage Conversion
Vout = D × Vin (ideal) Vout = D × Vin × η (practical) D = Vout / Vin
The buck always steps voltage down: Vout < Vin. At D=0.5 and Vin=12 V, Vout=6 V. Duty cycle is linearly proportional to output voltage.
Min Inductance (CCM)
L_min = Vout × (1−D) / (2 × Iout × fsw) or (Vin−Vout) × D / (2 × Iout × fsw)
Ensures CCM at full load. Recommended L = 1.3 × L_min. Lower inductance means lighter weight but higher ripple and easier DCM entry.
Inductor Ripple Current
ΔiL = (Vin−Vout) × D / (L × fsw) I_peak = Iout + ΔiL/2 I_valley = Iout − ΔiL/2
ΔiL/Iout ≈ 20–40% is the typical design target. I_peak drives inductor saturation rating and MOSFET peak current specs.
Output Capacitor (CCM)
C_ripple = ΔiL / (8 × fsw × ΔV) ΔV_esr = ESR × ΔiL C_tran = ΔI_step / (2 × fsw × ΔV) C_use = max(C_ripple, C_tran)
Two separate C requirements: steady-state ripple and load transient. The larger value dominates. Low-ESR ceramics minimise the ESR term.
CCM / DCM Boundary
L_crit = Vout×(1−D)/(2×Iout×fsw) I_crit = (Vin−Vout)×D/(2×L×fsw) CCM if Iout > I_crit (L > L_crit)
At the boundary, I_valley = 0. Below this the converter enters DCM. Synchronous rectifiers may use diode emulation in DCM for efficiency.
Q1 (High-Side) Loss
I_Q1_rms = sqrt(D) × sqrt(Iout²+ΔiL²/12) P_cond = I_Q1_rms² × Rds_HS P_sw = ½×Iout×Vin×t_rise×fsw P_Q1 = P_cond + P_sw
High-side FET carries current only during D. Switching loss dominates at high frequency — select low Qg for switching, low Rds for conduction.
Q2 (Low-Side / SR) Loss
I_Q2_rms = sqrt(1−D) × sqrt(Iout²+ΔiL²/12) P_cond = I_Q2_rms² × Rds_LS P_dead = Vf×Iavg×2×t_dead×fsw P_Q2 = P_cond + P_dead
Low-side SR carries current during (1−D). At high duty cycles Q2 conducts most of the time — minimise Rds_LS over switching FOM.

How a Synchronous Buck Converter Works

A buck (step-down) converter reduces a higher DC input voltage to a lower regulated DC output using two MOSFETs (or a MOSFET and diode), an inductor, and an output capacitor. The high-side switch (Q1) closes for a fraction D of each switching cycle, allowing current to ramp up through the inductor and store energy. When Q1 opens, the low-side switch (Q2) closes to provide a current path from ground — the inductor’s stored energy maintains current flow to the output.

The fundamental voltage relationship is V_out = D × V_in. A 50% duty cycle on a 12 V input produces 6 V output. Unlike the boost converter, the buck has no right-half-plane zero, making it substantially easier to stabilise with conventional voltage-mode or current-mode control.

Synchronous vs Asynchronous: A synchronous buck replaces the catch diode with a second MOSFET (the synchronous rectifier, SR). Because the SR FET has far lower conduction loss than a diode (I²×Rds vs Vf×I), synchronous designs achieve significantly higher efficiency — typically 92–97% vs 85–92% for asynchronous. Use this calculator’s toggle to compare both modes.

Frequently Asked Questions

What is the duty cycle formula for a buck converter?
Ideal duty cycle: D = V_out / V_in. With efficiency η: D = V_out / (V_in × η). For a 12 V to 5 V converter at 90% efficiency: D = 5 / (12 × 0.9) = 0.463 (46.3%). The ON time is t_on = D / f_sw and the OFF time is t_off = (1−D) / f_sw.
How do I size the inductor for a buck converter?
Use L_min = V_out × (1−D) / (2 × I_out × f_sw). Multiply by 1.3 for margin. Example: 5 V output, D=0.42, 3 A load, 400 kHz → L_min = 5 × 0.58 / (2 × 3 × 400,000) = 1.21 μH → use 1.8 μH. The inductor saturation current must exceed I_peak = I_out + ΔiL/2.
Why is the synchronous rectifier (low-side MOSFET) important?
In an asynchronous buck, the catch diode drops ~0.5–0.7 V, wasting P = Vf × I_out × (1−D) in heat. For a 5 V, 3 A converter at D=0.42: diode loss = 0.5 × 3 × 0.58 = 0.87 W, which is 5.8% of output power. A synchronous MOSFET with 12 mΩ Rds(on) loses only 3² × 0.012 × 0.58 = 62 mW — over 14× less loss.
What is dead time in a synchronous buck converter?
Dead time is a brief interval (typically 10–50 ns) between Q1 turning off and Q2 turning on, and vice versa. This prevents shoot-through — both MOSFETs conducting simultaneously, shorting V_in to GND. During dead time, current flows through Q2’s body diode (at Vf loss). Dead time loss = Vf × I_L × 2 × t_dead × f_sw. Minimise dead time without risking shoot-through for best efficiency.
Calculations are theoretical estimates. Actual performance depends on component parasitics, PCB layout, thermal management and control loop design.
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